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TDA4VM21 Datasheet(PDF) 105 Page - Texas Instruments |
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TDA4VM21 Datasheet(HTML) 105 Page - Texas Instruments |
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105 / 331 page  Table 5-81. SERDES3 Signal Descriptions (continued) SIGNAL NAME [1] (2) DESCRIPTION [2] PIN TYPE [3] BALL [4] PCIE_REFCLK3N PCIE Reference Clock Input/Output (negative) IO AE9 PCIE_REFCLK3P PCIE Reference Clock Input/Output (positive) IO AD10 SERDES3_REXT (1) External Calibration Resistor A AE8 SERDES3_RX0_N SERDES Differential Receive Data (negative) I AH9 SERDES3_RX0_P SERDES Differential Receive Data (positive) I AJ8 SERDES3_RX1_N SERDES Differential Receive Data (negative) I AH10 SERDES3_RX1_P SERDES Differential Receive Data (positive) I AJ9 SERDES3_TX0_N SERDES Differential Transmit Data (negative) O AF9 SERDES3_TX0_P SERDES Differential Transmit Data (positive) O AG8 SERDES3_TX1_N SERDES Differential Transmit Data (negative) O AF10 SERDES3_TX1_P SERDES Differential Transmit Data (positive) O AG9 (1) The external 3.01 kΩ ±1% resistor must be connected between this pin and VSS, even when the pin is unused. (2) The functionality of these pins is controlled by SERDES3_LN[1:0]_CTRL LANE_FUNC_SEL. Table 5-82. SERDES4 Signal Descriptions SIGNAL NAME [1] (2) DESCRIPTION [2] PIN TYPE [3] BALL [4] SERDES4_REFCLK_N SERDES Reference Differential Clock (negative) IO E7 SERDES4_REFCLK_P SERDES Reference Differential Clock (positive) IO E8 SERDES4_REXT (1) External Calibration Resistor A F9 SERDES4_RX0_N SERDES Differential Receive Data (negative) I D9 SERDES4_RX0_P SERDES Differential Receive Data (positive) I C10 SERDES4_RX1_N SERDES Differential Receive Data (negative) I D8 SERDES4_RX1_P SERDES Differential Receive Data (positive) I C9 SERDES4_RX2_N SERDES Differential Receive Data (negative) I D6 SERDES4_RX2_P SERDES Differential Receive Data (positive) I C7 SERDES4_RX3_N SERDES Differential Receive Data (negative) I D5 SERDES4_RX3_P SERDES Differential Receive Data (positive) I C6 SERDES4_TX0_N SERDES Differential Transmit Data (negative) O B11 SERDES4_TX0_P SERDES Differential Transmit Data (positive) O A12 SERDES4_TX1_N SERDES Differential Transmit Data (negative) O B10 SERDES4_TX1_P SERDES Differential Transmit Data (positive) O A11 SERDES4_TX2_N SERDES Differential Transmit Data (negative) O B8 SERDES4_TX2_P SERDES Differential Transmit Data (positive) O A9 SERDES4_TX3_N SERDES Differential Transmit Data (negative) O B7 SERDES4_TX3_P SERDES Differential Transmit Data (positive) O A8 (1) The external 3.01 kΩ ±1% resistor must be connected between this pin and VSS, even when the pin is unused. (2) The functionality of these pins is controlled by SERDES4_LN[4:0]_CTRL LANE_FUNC_SEL. 5.3.17 OSPI 5.3.17.1 MCU Domain Table 5-83. OSPI0 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] MCU_OSPI0_CLK OSPI Clock O E20 MCU_OSPI0_DQS OSPI Data Strobe (DQS) or Loopback Clock Input I D21 www.ti.com TDA4VM-Q1, TDA4VM SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 105 Product Folder Links: TDA4VM-Q1 TDA4VM |
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