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TDA4VM21 Datasheet(PDF) 110 Page - Texas Instruments |
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TDA4VM21 Datasheet(HTML) 110 Page - Texas Instruments |
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110 / 331 page ![]() Table 5-87. MMC0 Signal Descriptions (continued) SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] MMC0_DAT5 (2) MMC/SD/SDIO Data IO AF3 MMC0_DAT6 (2) MMC/SD/SDIO Data IO AG1 MMC0_DAT7 (2) MMC/SD/SDIO Data IO AF2 (1) An external 10 kΩ ±1% resistor must be connected between this pin and VSS. No external voltage should be applied to this pin. (2) An external pull-up of 10 kΩ ~ 50 kΩ ±1% resistor, as specified in the specification, must be connected to this ball to ensure proper operation. Table 5-88. MMC1 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] MMC1_CLK (1) MMC/SD/SDIO Clock IO P25 MMC1_CMD MMC/SD/SDIO Command IO R29 MMC1_SDCD(2) SD Card Detect I P23 MMC1_SDWP SD Write Protect I R28 MMC1_DAT0 MMC/SD/SDIO Data IO R24 MMC1_DAT1 MMC/SD/SDIO Data IO P24 MMC1_DAT2 MMC/SD/SDIO Data IO R25 MMC1_DAT3 MMC/SD/SDIO Data IO R26 (1) For MMC1_CLK signal to work properly, the RXACTIVE bit of the CTRLMMR_PADCONFIG171 register should be set to 0x1 because of retiming purposes. (2) For ROM boot from MMC1 interface to work properly, the MMC1_SDCD pin should be pulled low externally with a resistor to indicate an SD Card/Memory device is present. Table 5-89. MMC2 Signal Descriptions SIGNAL NAME [1] DESCRIPTION [2] PIN TYPE [3] BALL [4] MMC2_CLK (1) MMC/SD/SDIO Clock IO T26 MMC2_CMD MMC/SD/SDIO Command IO T25 MMC2_SDCD(2) SD Card Detect I W2 MMC2_SDWP SD Write Protect I W1 MMC2_DAT0 MMC/SD/SDIO Data IO T24 MMC2_DAT1 MMC/SD/SDIO Data IO T27 MMC2_DAT2 MMC/SD/SDIO Data IO T29 MMC2_DAT3 MMC/SD/SDIO Data IO T28 (1) For MMC2_CLK signal to work properly, the RXACTIVE bit of the CTRLMMR_PADCONFIG172 register should be set to 0x1 because of retiming purposes. (2) For MMC2 module to work properly, the MMC2_SDCD pin should be pulled low to indicate an SD Card/Memory device is present. 5.3.21 CPTS Note Some CPTS signals are connected directly to CPTS modules within the device. Other CPTS signals are connected to the Time Sync Router and fanned out to peripherals linked to the router. Input signals are sent to the peripherals while output signals are sourced from the peripherals. For more information, see the Time Sync and Compare Events section in the Time Sync chapter in the device TRM. TDA4VM-Q1, TDA4VM SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024 www.ti.com 110 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TDA4VM-Q1 TDA4VM |
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