TDA4VM21 datasheet(206/331 Pages) TI

206 / 331 page

Device

WKUP_LFOSC0_XO

WKUP_LFOSC0_XI

J7ES_LF_OSC_NOT_USED_14

Figure 6-37. WKUP_LFOSC0 Not Used

6.9.4.2 Output Clocks

The device provides several system clock outputs. Summary of these output clocks are as follows:

• MCU_CLKOUT0

– Reference clock output for Ethernet PHYs (50 MHz or 25 MHz)

• MCU_SYSCLKOUT0

– SYSCLK0 of WKUP_PLLCTRL0 is divided by 6 and then sent out of the device as a LVCMOS clock signal

(MCU_SYSCLKOUT0). This signal can be used to test if the main chip clock is functioning or not.

• MCU_OBSCLK0

– On the clock output MCU_OBSCLK0, oscillators and PLLs clocks can be observed for tests and debug.

• SYSCLKOUT0

– SYSCLK0 from the MAIN_PLL controller is divided by 6 and then sent out of the device as a LVCMOS

clock signal (SYSCLKOUT0). This signal can be used to test if the main chip clock is functioning or not.

• CLKOUT

– Reference clock output

• OBSCLK[2:0]

– On the clock output OBSCLK0, oscillators and PLLs clocks can be observed for tests and debug.

TDA4VM-Q1, TDA4VM

SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024

www.ti.com

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TDA4VM21 Datasheet(PDF) 206 Page - Texas Instruments