TDA4VM21 datasheet(233/331 Pages) TI

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–

I = (2 + 0.5 × WEExtraDelay) × GPMC_FCLK(17) if ((WEOffTime - ClkActivationTime - 2) is a multiple of 3)

(10) J = GPMC_FCLK(17)

(11) First transfer only for CLK DIV 1 mode.

(12) Half cycle; for all data after initial transfer for CLK DIV 1 mode.

(13) Half cycle of GPMC_CLKOUT; for all data for modes other than CLK DIV 1 mode. GPMC_CLKOUT divide down from GPMC_FCLK.

(14) In GPMC_CSn[i], i is equal to 0, 1, 2, or 3. In GPMC_WAIT[j], j is equal to 0, 1, 2, or 3.

(15) P = GPMC_CLK period in ns

(16) For read: K = (ADVRdOffTime - ADVOnTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17)

For write: K = (ADVWrOffTime - ADVOnTime) × (TimeParaGranularity + 1) × GPMC_FCLK(17)

(17) GPMC_FCLK is general-purpose memory controller internal functional clock period in ns.

(18) Related to the GPMC_CLK output clock maximum and minimum frequencies programmable in the GPMC module by setting the

GPMC_CONFIG1_i configuration register bit field GPMCFCLKDIVIDER.

(19) For div_by_1_mode:

•

GPMC_CONFIG1_i register: GPMCFCLKDIVIDER = 0h:

–

GPMC_CLK frequency = GPMC_FCLK frequency

For no extra_delay:

•

GPMC_CONFIG2_i Register: CSEXTRADELAY = 0h = CSn Timing control signal is not delayed

•

GPMC_CONFIG4_i Register: WEEXTRADELAY = 0h = nWE timing control signal is not delayed

•

GPMC_CONFIG4_i Register: OEEXTRADELAY = 0h = nOE timing control signal is not delayed

•

GPMC_CONFIG3_i Register: ADVEXTRADELAY = 0h = nADV timing control signal is not delayed

(20) For 100 MHz:

•

CTRLMMR_GPMC_CLKSEL[1-0] CLK_SEL = 01 = MAIN_PLL2_HSDIV1_CLKOUT / 3

For 133 MHz:

•

CTRLMMR_GPMC_CLKSEL[1-0] CLK_SEL = 00 = MAIN_PLL0_HSDIV3_CLKOUT

GPMC_CLK

GPMC_CSn[i]

GPMC_A[MSB:1]

GPMC_BE0n_CLE

GPMC_BE1n

GPMC_ADVn_ALE

GPMC_OEn_REn

GPMC_AD[15:0]

GPMC_WAIT[j]

Valid Address

D 0

F12

F13

F11

F19

F18

F20

F10

F19

F12

GPMC_01

In GPMC_CSn[i], i is equal to 0, 1, 2 or 3.

In GPMC_WAIT[j], j is equal to 0, 1, 2, or 3.

Figure 6-63. GPMC and NOR Flash — Synchronous Single Read (GPMCFCLKDIVIDER = 0)

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TDA4VM-Q1, TDA4VM

SPRSP36K – SEPTEMBER 2021 – REVISED APRIL 2024

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TDA4VM21 Datasheet(PDF) 233 Page - Texas Instruments

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