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LTM4702 Datasheet(PDF) 31 Page - Analog Devices |
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LTM4702 Datasheet(HTML) 31 Page - Analog Devices |
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31 / 38 page ![]() Data Sheet LTM4640 analog.com Rev. 0 31 of 38 Layout Checklist/Example The high integration of LTM4640 makes the printed circuit board (PCB) layout very simple and easy to use. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. 1. Use large PCB copper areas for high current paths, including VIN, GND, and VOUT. It helps to minimize the PCB conduction loss and thermal stress. 2. To minimize noise coupling on the output, reduce the copper area border between VIN and VOUT, and separate them with GND copper. 3. Place high-frequency ceramic input and output capacitors next to the VIN, PGND, and VOUT pins to minimize high-frequency noise. 4. Place a dedicated power ground layer underneath the unit. 5. To minimize the via conduction loss and reduce the µModule thermal stress, use multiple vias for interconnection between the top layer and other power layers. 6. Do not put vias directly on the pad unless they are capped or plated over. 7. Bring out test points on the signal pins for monitoring. 8. Keep separation between CLKIN, CLKOUT, and FREQ pin-traces to minimize the possibility of noise due to crosstalk between these signals. Figure 36 gives a good example of the recommended PCB layout. Figure 36. Recommended PCB Layout VIN GND VOUT |
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