Data Sheet

LTM4640

analog.com

Rev. 0

17 of 38

Forced Continuous Mode

In applications where fixed frequency operation is more critical than low current efficiency, and where the lowest

output ripple is desired, FCM operation should be used. FCM operation can be enabled by connecting the

MODE/CLKIN pin to INTVCC. In this mode, the inductor current can reverse during low output loads, the COMP

voltage is in control of the current comparator threshold throughout, and the top MOSFET always turns on with

each oscillator pulse. During startup, FCM is disabled, and the inductor current is prevented from reversing until the

LTM4640’s output voltage is in regulation.

Operating Frequency

The operating frequency of the LTM4640 is optimized to achieve the compact package size and the minimum

output ripple voltage while keeping high efficiency. The default operating frequency is 600kHz. In most

applications, no additional frequency adjustment is required.

If an operating frequency other than 600kHz is required by the application, the operating frequency is increased by

adding a resistor, RFSET, between the FREQ pin and GND, as shown in Figure 38, or is decreased by adding a

resistor between the FREQ pin and INTVCC. The RFSET resistance value is calculated with Equation 5.

������������������������������ =

{

1.67 × 1011Ω × ������������

������ − 600������������������

(������ > 600������������������)

2.72 × 1011Ω × ������������

600������������������ − ������

(������ < 600������������������)

(5)

The programmable operating frequency range is from 400kHz to 3MHz.

Frequency Synchronization and Clock In

The LTM4640 has a phase-locked loop comprised of an internal voltage-controlled oscillator and a phase detector.

This allows the internal top MOSFET turn-on to be locked to the rising edge of the external clock. The external clock

frequency range must be within ±30% around the operating frequency set by the RFSET resistor. A pulse detection

circuit detects a clock on the CLKIN pin to turn on the phase-locked loop. The pulse width of the clock must be at

least 100ns. The clock’s high level must be above 1V and the clock’s low level below 0.3V. During the startup of the

regulator, the phase-locked loop function is disabled.

Multiphase Operation

For output loads that demand more than 20A of current, multiple LTM4640s are paralleled to run out-of-phase to

provide more output current without increasing input and output voltage ripples.

The CLKOUT signal is connected to the MODE/CLKIN pin of the following LTM4640 stage to line up both the

frequency and the phase of the entire system. Connecting the PHMODE pin to INTVCC, GND, or FLOAT generates a

phase difference (between CLKIN and CLKOUT) of 180°, 120°, or 90°, respectively, which corresponds to 2-phase, 3-

phase, or 4-phase operation. Figure 39 shows a 2-phase design. For a 3-phase or a 4-phase operation to achieve the

best performance, it is recommended to use an external clock integrated circuit (IC) to provide the desired phase

difference for each LTM4640. An optional low-pass filter is added to each external clock signal before it is fed to the

LTM4640. Figure 19 shows a 4-phase design in such a way. Interleaving among more than four phases is not

recommended.