SC416 datasheet(21/34 Pages) SEMTECH

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SC416

Applications Information (continued)

This would cause the output current to move from 10A

to zero in 4μsec.

COUT = 12.1 × (1.5μH × 12.1 / 1.8 - 10 / (2.5A/1μsec))

____________________________________

2 × (1.98 - 1.8)

COUT = 204μF

Note that 204μF is less than the 323uF needed to meet

the harder (instantaneous) transient load release.

Stability Considerations

Unstable operation shows up in two related but distinct-

ly different ways: fast-feedback loop instability due to in-

sufficient ESR and double-pulsing.

Loop instability can cause oscillations at the output as a

response to line or load transients. These oscillations can

trip the over-voltage protection latch or cause the output

voltage to fall below the tolerance limit. The best way for

checking stability is to apply a zero-to-full load transient

and observe the output voltage ripple envelope for over-

shoot and ringing. Over one cycle of ringing after the ini-

tial step is a sign that the ESR should be increased.

SC416 ESR Requirements

The on-time control used in the SC416 regulates the

valley of the output ripple voltage. This ripple voltage

consists of a term generated by the ESR of the output

capacitor and a term based on the capacitance charging

and discharging during the switching cycle. A minimum

ESR is required to generate the required ripple voltage

for regulation. For most applications the minimum ESR

ripple voltage is dominated by PCB layout and the prop-

erties of the output capacitors, typically SP or POSCAP

devices. For stability the ESR zero of the output capacitor

should be lower than one-third the switching frequency.

The formula for minimum ESR is:

ESRMIN = 3 / (2 × π × COUT × FREQ)

For applications using ceramic output capacitors, the ESR

is generally too small to meet the above criteria. In these

cases it is possible to create a ripple voltage ramp that

mimics the ESR ramp. This virtual ESR ramp is created by

integrating the voltage across the inductor, and coupling

the signal into the FB pin as shown in Figure 13.

To FB

COUT

VIN

Figure 13

Double-pulsing

Double-pulsing occurs because the ripple waveform

seen at the FB pin is either too small, or because the FB

and VOUT ripple waveforms are very noisy and prone to

cause premature triggering of the FB comparator. Both

are discussed below.

Increasing FB Ripple

If the ripple waveform at FB is too small, the FB waveform

will be susceptible to switching noise. Note that under

normal conditions the FB voltage is within 10-20mV of

the 750mV trip point. Noise can couple into the FB point

from either side1 or side1, or from an external circuit. This

causes the FB comparator to trigger too quickly after the

330ns minimum off-time has expired. Double-pulsing

will result in higher ripple voltage at the output but in

most cases is harmless.

A way to remedy this is to couple more ripple into FB

from VOUT. Note that the feedback resistor divider at-

tenuates the FB ripple. This can be compensated by

placing a small capacitor in parallel with the top resistor,

which effectively increases the ripple that appears at FB.

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