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SC416 Datasheet(PDF) 26 Page - Semtech Corporation |
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SC416 Datasheet(HTML) 26 Page - Semtech Corporation |
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26 / 34 page ![]() SC416 26 For placement, power devices for side1 should be grouped together near the gate drive pins for side1 (pins 23-24 and 1-8). Power devices for side2 should be grouped together near the gate-drive pins for side2 (pins 15-20). The feedback and VOUT sense components should be located near the FBx/VOUTx pins. This includes the feed- back resistors and capacitors if used. Ground Connections When doing placement, be aware that there are four grounds to consider on the pcb. ‘ Power ground for Side1 Power ground for Side2 Analog ground for Side1 Analog ground for Side2 Note that grounds (1) and (2) are high-current and con- tain high noise. These grounds carry the DL gate drive current as well as the high switching current through the MOSFETs and low-side diode. It is important to note that the SC416 has only one power ground pin (PAD, pin 25), which must drive DL for both side1 and side2. As such, the low-side MOSFET and diode will need to be near the IC. Grounds (3) and (4) are low-current and intended for low-noise VOUT/FB ripple sensing. Note that there is only one analog ground pin (RTN, pin 9) which shared between sides 1 and 2 Proper connection between the grounds is needed for good operation. Generally, all ground connections be- tween the power components and the SC416 should be short and direct, without vias where possible. Each side has significant high-current switching in the ground path, moving between the input capacitors, the low-side MOSFET, the low-side diode if used, and the output ca- pacitors. Moreover, each side has significant high-cur- rent pulses to/from the ground PAD, created by the DL 1. 2. 3. 4. drive to the low-side MOSFETs. The DL gate-drive cur- rent peaks can be 2 amps or more, with fast switching. As such the ground connection between the low-side MOS- FETs and the ground PAD should be as short and wide as practical. Note that the ground PAD, which is the return path for the high-noise DL drive current, is not accessible on the top layer of the pcb, due to the other pins. The ground PAD connection to the MOSFETs must therefore be done on an inner or bottom layer. For this reason, it is best to place the low-side MOSFET on the opposite side of the pcb, to allow a wide and direct connection to the ground PAD on the bottom layer. Otherwise an inner layer must be used for the ground PAD connection; if needed, this should be done with many vias to minimize the high-fre- quency impedance. This applies to both side1 and side2 MOSFETs. The remaining power devices should then be placed with their ground pins near each other, and near the IC. That is, the ground connections between the IC, the low- side MOSFET, the low-side diode (if used), the input ca- pacitors, and the output capacitor, should be short. The other non-ground power connections (from input cap to high-side MOSFET, from MOSFETs to inductor, and from inductor to output capacitor) should be short and wide as well, to minimize the loop length and area. Use short, wide traces from the DL/DH pins to the MOS- FETs to reduce parasitic impedance; the low-side MOS- FET is most critical. Maintain a length to width ratio of <20:1 for gate drive signals. Use multiple vias as required for current handling (and to reduce parasitics) if routed on more than one layer. When placing the power components, also be aware that the VOUT signal must route back to the analog compo- nents. It is important that this feedback signal not cross the DH/DL/BST or other high-noise power signals. Place and rotate the power components in a way that allows the VOUT trace to get from the output capacitor to the Applications Information (continued) |
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