AM69 datasheet(148/326 Pages) TI1

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Table 5-121. Connectivity Requirements (continued)

ALY

BALL

NUMBER

AND

BALL

NUMBER

BALL NAME

CONNECTION REQUIREMENT

DDR0_*

DDRSS0, DDRSS1, DDRSS2 and DDRSS3 must always be used

in incremental order. For instance, when using a single LPDDR

component, it must be connected to the DDR0_* interface. When using

two LPDDR components, they must be connected to DDR0_* and

DDR1_* interfaces, and so forth.

DDR1_*

DDR2_*

DDR3_*

Table 5-122 shows the specific connection requirements for the RESERVED ball numbers on the device.

Note

For additional clarification, "left unconnected" or "no connect" (NC) means no signal traces can be

connected to these device ball numbers.

Table 5-122. Reserved Balls Specific Connection Requirements

ALY BALL NUMBERS

AND BALL NUMBERS

CONNECTION REQUIREMENTS

AF7 / AK2 / AK29 / AK31 / AL11 / AL23 /

AL24 / AL25 / AL27 / AL30 / AM10 / AM12 /

AM14 / AM16 / AM17 / AM21 / AM22 / AM26 /

AM29 / AM33 / AM9 / AN13 / AN20 / AN21 /

G17 / G22 / G30 / H12 / H14 / H32 / H33 /

J31 / J33 / K30 / L30 / N7 / T7 / Y7

AH4 / AH7 / AH8 / E28 / F27 / J29 / L28 /

L29 / L30 / M30

RESERVED.

These balls must be left unconnected.

AM69A, AM69

SPRSP92D – FEBRUARY 2023 – REVISED DECEMBER 2024

www.ti.com

148

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