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ADF4382ABCCZ Datasheet(PDF) 60 Page - Analog Devices |
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ADF4382ABCCZ Datasheet(HTML) 60 Page - Analog Devices |
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60 / 82 page ![]() Data Sheet ADF4382A REGISTER MAP analog.com Rev. A | 60 of 82 Table 95. Bit Descriptions for REG0053 Bits Bit Name Description Reset Access 7 RESERVED Reserved. 0x0 R/W 6 PD_SYNC_MON Power down the SYNC setup and hold monitor. 0x0 R/W 0: Normal Operation. 1: Power down the SYNC Setup/hold monitor. 5 SYNC_SEL SYNC CML/PECL input or LVDS input. 0x0 R/W 0: CML/PECL input. 1: LVDS input. 4 RST_SYNC_MON Clear the output latch of the setup and hold monitor. 0x0 R/W 0: Reset Inactive. 1: Reset Active. [3:0] REG53_RSV0 Reserved. ADF4382A register map provides reserved register settings. 0x0 R/W Address: 0x054, Reset: 0x00, Name: REG0054 Table 96. Bit Descriptions for REG0054 Bits Bit Name Description Reset Access [7:1] RESERVED Reserved. 0x0 R 0 ADC_ST_CNV Starts an ADC conversion. 0x0 R/W Address: 0x055, Reset: 0x00, Name: REG0055 Table 97. Bit Descriptions for REG0055 Bits Bit Name Description Reset Access [7:0] COUNTER_READBACK[7:0] Frequency counter output. 0x0 R Address: 0x056, Reset: 0x00, Name: REG0056 Table 98. Bit Descriptions for REG0056 Bits Bit Name Description Reset Access [7:0] COUNTER_READBACK[15:8] Frequency counter output. 0x0 R Address: 0x057, Reset: 0x00, Name: REG0057 Table 99. Bit Descriptions for REG0057 Bits Bit Name Description Reset Access [7:0] COUNTER_READBACK[23:16] Frequency counter output. 0x0 R Address: 0x058, Reset: 0x00, Name: REG0058 Table 100. Bit Descriptions for REG0058 Bits Bit Name Description Reset Access 7 LUT_BUSY VCO LUT generation status. 0x0 R 6 SYNC_OK SYNC is setup/hold time with respect to reference indicator. 0x0 R 0: SYNC is not in correct setup and hold with respect to reference. 1: SYNC is in correct setup and hold with respect to reference. 5 DEL_STR Delay Strobe indicator. 0x0 R 4 DEL_ADJ Delay Adjust direction indicator. 0x0 R 0: Negative phase adjustment. |
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