LM87 datasheet(7/45 Pages) TI2

7 / 45 page

LM87

www.ti.com

SNAS034J – APRIL 2000 – REVISED MARCH 2013

AC Electrical Characteristics

The following specifications apply for +2.8 VDC ≤V

+ ≤ +3.8 V

DC on SMBCLK and SMBData, unless otherwise specified.

Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits T A = TJ = 25°C.

(1)

Typical

Limits

Units

Symbol

Parameter

Conditions

(2)

(3)

(Limits)

SERIAL BUS TIMING CHARACTERISTICS

t 1

SMBCLK (Clock) Period

2.5

μs (min)

trise

SMBCLK and SMBData Rise Time

μs (max)

tfall

SMBCLK and SMBData Fall Time

300

ns (max)

t 2

Data In Setup Time to SMBCLK High

100

ns (min)

100

ns (min)

t 3

Data Out Stable After SMBCLK Low

300

ns (max)

t 4

SMBData Low Setup Time to SMBCLK Low (start)

100

ns (min)

t 5

SMBData High Hold Time After SMBCLK High

100

ns (min)

(stop)

SMBCLK low time required to reset the Serial Bus

tTIMEOUT

ms (min)

Interface to the Idle State

ms (max)

Capacitive Load on SMBCLK and SMBData

pF (max)

(1)

Timing specifications are tested at the specified logic levels, VIL for a falling edge and VIH for a rising edge.

(2)

Typicals are at TJ = TA = 25 °C and represent most likely parametric norm.

(3)

Limits are specified to TI's AOQL (Average Outgoing Quality Level).

Figure 1. Serial Bus Timing Diagram

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