5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MIN

MAX

UNIT

5V Supply Voltage

VDD5

–0.3

6

V

3.3V Supply Voltage

VCC33

–0.3

4

V

Control Pins

ADDR, PORT, ID, INT_N/OUT3, ENn_CC,

SDA/OUT1, SCL/OUT2

–0.3

VDD5 +0.3

V

CC1, CC2

–0.3

6

V

ENn_MUX, DIR

–0.3

VCC33 +0.3

V

VBUS_DET

–0.3

4

V

Super-speed Differential Signal Pins

[RX/TX] [p/n], [RX/TX][2/1][p/n]

–0.3

2.5

V

Storage temperature, Tstg

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

5.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-

C101(2)

±1500

(1)

JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process..

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VDD5

5V Supply Voltage range

4.5(1)

5.5

V

VCC33

3.3V Supply Voltage range

3

3.6

V

VDD

Supply range for I2C (SDA, SCL) pins

1.65

3.6

V

VDD5(ramp)

VDD5 supply ramp time

25

ms

V(diff)

High speed signal pins differential voltage

0

1.8

VPP

V(cm)

High speed signal pins common mode voltage

0

2

V

TA

Operating free-air/ambient temperature (HD3SS3220)

0

70

°C

TA

Operating free-air/ambient temperature (HD3SS3220I)

–40

85

°C

V(BUS)

System V(BUS) input voltage through 900K resistor

4

5

28

V

C(BULK)

Bulk capacitance on VCONN. Only when VCONN is on.

Disconnected when VCONN is off. Shall be placed on VDD5.

10

200

µF

R(p_ODext)

External Pull up resistor on Open Drain IOs (OUT1, OUT2, INT/

OUT3, ID, VCONN_FAULT_N, and DIR pins)

200

KΩ

R(p_TLext)

Tri-level input external pull-up resistor (PORT and ADDR pins)

4.7

KΩ

R(p_15A)

External pull up resistor to advertise 1.5A (CURRENT_MODE pin)

500

KΩ

R(p_3A)

External pull up resistor to advertise 3A (CURRENT_MODE pin)

10

KΩ

R(p_i2c_ext)

External Pull up resistance on I2C bus

(Could be 4.7K or higher. Nominal value listed)

2.2

KΩ

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HD3SS3220, HD3SS3220L

SLLSES1E – DECEMBER 2015 – REVISED JULY 2025

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