INA159 datasheet(33/51 Pages) TI2

33 / 51 page

INA826

www.ti.com

SBOS562G – AUGUST 2011 – REVISED JUNE 2020

Product Folder Links: INA826

Submit Documentation Feedback

10 Power Supply Recommendations

The nominal performance of the INA826 is specified with a supply voltage of ±15 V and mid-supply reference

voltage. The device can also be operated using power supplies from ±1.5 V (3 V) to ±18 V (36 V) and non mid-

supply reference voltages with excellent performance. Parameters that can vary significantly with operating

voltage and reference voltage are illustrated in the Typical Characteristics section.

11 Layout

11.1 Layout Guidelines

Attention to good layout practices is always recommended. Keep traces short and, when possible, use a printed

circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible.

Place 0.1-μF bypass capacitors close to the supply pins. Apply these guidelines throughout the analog circuit to

improve performance and provide benefits such as reducing the electromagnetic-interference (EMI) susceptibility.

The INA826EVM is intended to provide basic functional evaluation of the INA826. An image of the INA826EVM is

provided in Figure 73. The INA826EVM is also available for purchase through the TI eStore.

Attention to good layout practices is always recommended. For best operational performance of the device, use

good PCB layout practices, including:

•

Make sure to match both input paths to avoid converting common-mode signals into differential signals.

•

Connect a bypass capacitor of 0.1-µF between each supply pin and ground, placed close to the device as

possible.

•

Route the input traces as far away from the supply or output traces as possible. This reduces parasitic

coupling.

•

Place the external components as close to the device as possible.

•

Keep traces as short as possible.

•

For the DRG package: Connect the exposed thermal pad to the lowest voltage potential on the circuit that is

the negative power supply (–V).

11.1.1 CMRR vs Frequency

The INA826 pinout is optimized for achieving maximum CMRR performance over a wide range of frequencies.

However, make sure that both input paths are well-matched for source impedance and capacitance to avoid

converting common-mode signals into differential signals. In addition, parasitic capacitance at the gain-setting

pins can also affect CMRR over frequency. For example, in applications that implement gain switching using

switches or PhotoMOS® relays to change the value of RG, choose the component so that the switch capacitance

is as small as possible.

INA159 Datasheet(PDF) 33 Page - Texas Instruments

INA159 Datasheet(HTML) 33 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

Datasheet Download

Link URL