LPC2460 datasheet(22/68 Pages) PHILIPS

22 / 68 page

LPC2460_2

Preliminary data sheet

Rev. 02 — 1 February 2008

22 of 68

NXP Semiconductors

LPC2460

Fast communication chip

P4[28]/BLS2/

MAT2[0]/TXD3

170[1]

C11[1]

I/O

P4 [28] — General purpose digital input/output pin.

BLS2 — LOW active Byte Lane select signal 2.

MAT2[0] — Match output for Timer 2, channel 0.

TXD3 — Transmitter output for UART3.

P4[29]/BLS3/

MAT2[1]/RXD3

176[1]

B10[1]

I/O

P4[29] — General purpose digital input/output pin.

BLS3 — LOW active Byte Lane select signal 3.

MAT2[1] — Match output for Timer 2, channel 1.

RXD3 — Receiver input for UART3.

P4[30]/CS0

187[1]

B7[1]

I/O

P4[30] — General purpose digital input/output pin.

CS0 — LOW active Chip Select 0 signal.

P4[31]/CS1

193[1]

A4[1]

I/O

P4[31] — General purpose digital input/output pin.

CS1 — LOW active Chip Select 1 signal.

ALARM

37[8]

N1[8]

ALARM — RTC controlled output. This is a 1.8 V pin. It goes HIGH when

a RTC alarm is generated.

USB_D

−2

I/O

USB_D

−2 — USB port 2 bidirectional D− line.

DBGEN

9[1]

F4[1]

DBGEN — JTAG interface control signal. Also used for boundary

scanning.

TDO

2[1]

D3[1]

TDO — Test data out for JTAG interface.

TDI

4[1]

C2[1]

TDI — Test data in for JTAG interface.

TMS

6[1]

E3[1]

TMS — Test Mode Select for JTAG interface.

TRST

8[1]

D1[1]

TRST — Test Reset for JTAG interface.

TCK

10[1]

E2[1]

TCK — Test Clock for JTAG interface. This clock must be slower than 1

⁄6

of the CPU clock (CCLK) for the JTAG interface to operate.

RTCK

206[1]

C3[1]

I/O

RTCK — JTAG interface control signal.

Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0])

to operate as Trace port after reset.

RSTOUT

RSTOUT — This is a 3.3 V pin. LOW on this pin indicates LPC2460 being

in Reset state.

RESET

35[7]

M2[7]

external reset input: A LOW on this pin resets the device, causing I/O

ports and peripherals to take on their default states, and processor

execution to begin at address 0. TTL with hysteresis, 5 V tolerant.

XTAL1

44[8]

M4[8]

Input to the oscillator circuit and internal clock generator circuits.

XTAL2

46[8]

N4[8]

Output from the oscillator ampliﬁer.

RTCX1

34[8]

K2[8]

Input to the RTC oscillator circuit.

RTCX2

36[8]

L2[8]

Output from the RTC oscillator circuit.

VSSIO

33, 63,

77, 93,

114,

133,

148,

169,

189,

200[9]

L3, T5,

R9,

P12,

N16,

H14,

E15,

A12,

B6, A2[9]

ground: 0 V reference for the digital I/O pins.

VSSCORE

32, 84,

172[9]

K4, P10,

D12[9]

ground: 0 V reference for the core.

Table 4.

Pin description …continued

Symbol

Ball

Type

Description

LPC2460 Datasheet(PDF) 22 Page - NXP Semiconductors

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