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L99DZ320 Datasheet(PDF) 126 Page - STMicroelectronics |
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L99DZ320 Datasheet(HTML) 126 Page - STMicroelectronics |
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126 / 146 page  6.5.5 Status register 5 (0x05) Table 114. Status register 5 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit name Access R&C Table 115. Status register 5 description Bit Name Description 23-22 RESERVED - 21 HS0_OL HS0 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 20 HS15_OL HS15 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 19 HS14_OL HS14 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 18 HS13_OL HS13 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 17 HS12_OL HS12 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 16 HS11_OL HS11 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 15 RESERVED - 14 HS9_OL HS9 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 13 HS8_OL HS8 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 12 HS7_OL HS7 open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 11 HB6_LS_OL HB6 low-side open-load ‘1’ indicates an open-load condition was detected at the output Bit is latched until a “Read & Clear” command 10 HB6_HS_OL HB6 high-side open-load L99DZ320 SPI Registers DS14235 - Rev 5 page 126/146 |
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