L99DZ320 datasheet(128/146 Pages) STMICROELECTRONICS

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Bit

Name

Description

‘1’ indicates the output was shutdown due to overcurrent condition

Bit is latched until a “Read & Clear” command

RESERVED -

HS9_OC

HS9 overcurrent shutdown

‘1’ indicates the output was shutdown due to overcurrent condition

Bit is latched until a “Read & Clear” command

HS8_OC

HS8 overcurrent shutdown:

‘1’ indicates the output was shutdown due to overcurrent condition

Bit is latched until a “Read & Clear” command

HS7_OC

HS7 overcurrent shutdown:

‘1’ indicates the output was shutdown due to overcurrent condition

Bit is latched until a “Read & Clear” command

HB6_LS_OC HB6 overcurrent shutdown:

‘1’ indicates the output was shutdown due to overcurrent condition.

If overcurrent recovery is disabled (CR13: HB6_OCR = 0): Bit is set upon overcurrent condition and HB6 is turned off

If overcurrent recovery is enabled (CR13: HB6_OCR = 1): in case of overcurrent condition this bit is not set. The

HB6 goes into Overcurrent Recovery mode.

Bit is latched until a “Read & Clear” command

HB6_HS_OC

HB5_LS_OC HB5 overcurrent shutdown:

‘1’ indicates the output was shutdown due to overcurrent condition

If overcurrent recovery is disabled (CR13: HB5_OCR = 0): bit is set upon overcurrent condition and HB5 is turned off

If overcurrent recovery is enabled (CR13: HB5_OCR = 1): in case of overcurrent condition this bit is not set. The

HB5 goes into overcurrent recovery mode

Bit is latched until a “Read & Clear” command

HB5_HS_OC

HB4_LS_OC HB4 overcurrent shutdown:

‘1’ indicates the output was shutdown due to overcurrent condition.

If overcurrent recovery is disabled (CR13: HB4_OCR = 0): bit is set upon overcurrent condition and HB4 is turned off

If overcurrent recovery is enabled (CR13: HB4_OCR = 1): In case of overcurrent condition this bit is not set. The

HB4 goes into overcurrent recovery mode

Bit is latched until a “Read & Clear” command

HB4_HS_OC

5:0

RESERVED -

6.5.7

Status register 7 (0x07)

Table 118. Status register 7

Bit

name

Access

R&C

Table 119. Status register 7 description

Bit

Name

Description

LIN_PERM_DOM LIN bus signal dominant timeout

L99DZ320

SPI Registers

DS14235 - Rev 5

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