LM5145 datasheet(27/60 Pages) TI2

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• RDS(on) at VGS = 5V

• Drain-source voltage rating, BVDSS, typically 40V or 60V, depending on the maximum input voltage

• Gate charge parameters at VGS = 5V

• Output charge, QOSS, at the relevant input voltage

• Body diode reverse recovery charge, QRR

• Gate threshold voltage, VGS(th), derived from the Miller plateau evident in the QG versus VGS plot in the

MOSFET data sheet. With a Miller plateau voltage typically in the range of 2V to 3V, the 5V gate drive

amplitude of the LM25139 provides an adequately enhanced MOSFET when on and a margin against Cdv/dt

shoot-through when off.

The MOSFET-related power losses for one channel are summarized by the equations presented in Table 7-1,

where suffixes one and two represent high-side and low-side MOSFET parameters, respectively. While the

influence of inductor ripple current is considered, second-order loss modes, such as those related to parasitic

inductances and SW node ringing, are not included.

Table 7-1. MOSFET Power Losses

POWER LOSS MODE

HIGH-SIDE MOSFET

LOW-SIDE MOSFET

MOSFET conduction(2)

(3)

Pcond1=D× IOUT2+∆IL212 ×RDSon1

Pcond2=D′× IOUT2+∆IL212 ×RDSon2

MOSFET switching

Psw1=VIN×FSW2× IOUT−∆IL2 ×tR+

IOUT+∆IL2 ×tF

Negligible

MOSFET gate drive(1)

PGate1=VCC×FSW×QG1

PGate2=VCC×FSW×QG2

MOSFET output

charge(4)

PCoss=FSW× VIN×Qoss2+Eoss1−Eoss2

Body diode

conduction

N/A

PcondBD=VF×FSW× IOUT+∆IL2 ×tdt1+

IOUT−∆IL2 ×tdt2

Body diode

reverse recovery(5)

PRR=VIN×FSW×QRR2

(1)

Gate drive loss is apportioned based on the internal gate resistance of the MOSFET, externally added series gate resistance and the

relevant driver resistance of the LM25139.

(2)

MOSFET RDS(on) has a positive temperature coefficient of approximately 4500ppm/°C. The MOSFET junction temperature, TJ, and the

rise over ambient temperature is dependent upon the device total power dissipation and the thermal impedance. When operating at or

near minimum input voltage, make sure that the MOSFET RDS(on) is rated for the available gate drive voltage.

(3)

D' = 1D is the duty cycle complement.

(4)

MOSFET output capacitances, Coss1 and Coss2, are highly non-linear with voltage. These capacitances are charged losslessly by

the inductor current at high-side MOSFET turn-off. During turn-on, however, a current flows from the input to charge the output

capacitance of the low-side MOSFET. Eoss1, the energy of Coss1, is dissipated at turn-on, but this is offset by the stored energy Eoss2 on

Coss2.

(5)

MOSFET body diode reverse recovery charge, QRR, depends on many parameters, particularly forward current, current transition

speed and temperature.

The high-side (control) MOSFET carries the inductor current during the PWM on time (or D interval) and typically

incurs most of the switching losses. Choosing a high-side MOSFET that balances conduction and switching

loss contributions is therefor imperative. The total power dissipation in the high-side MOSFET is the sum of the

losses due to conduction, switching (voltage-current overlap), output charge, and typically two-thirds of the net

loss attributed to body diode reverse recovery.

The low-side (synchronous) MOSFET carries the inductor current when the high-side MOSFET is off (or during

the 1D interval). The low-side MOSFET switching loss is negligible as the low-side MOSFET switching loss is

switched at zero voltage – current just communicates from the channel to the body diode or vice versa during

the transition dead times. The LM25139, with the adaptive gate drive timing, minimizes body diode conduction

losses when both MOSFETs are off. Such losses scale directly with switching frequency.

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LM25139

SLVSJ80 – OCTOBER 2025

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