ADC34RF72 datasheet(6/74 Pages) TI2

6 / 74 page

Table 4-1. Pin Functions (continued)

TYPE

(1)

DESCRIPTION

NAME

NO.

LVDSD29N,

LVDSD29P

C3,

LVDS output interface

Not yet supported in software. Leave as 'No Connect'

LVDSD30N,

LVDSD30P

G2,

LVDSD31N,

LVDSD31P

E2,

J5,J14,K1,K5,K14,L1

Do not connect

RESET

Hardware reset. Active low. This pin has an internal 10kΩ pullup resistor to AVDD18.

SCLK

K15

Serial interface clock input. This pin has an internal 10kΩ pulldown resistor.

SDIO

L15

I/O

Serial interface data input/output. This pin has an internal 10kΩ pulldown resistor.

SDOUT

Serial interface data output.

SEN

J16

Serial interface enable. Active low. This pin has an internal 10kΩ pullup resistor to AVDD18.

STX0N,

STX0P

C17,

B17

Differential, high-speed serial JESD204B/C output data interface, lane 0

STX1N,

STX1P

A16,

A15

Differential, high-speed serial JESD204B/C output data interface, lane 1

STX2N,

STX2P

A14,

A13

Differential, high-speed serial JESD204B/C output data interface, lane 2

STX3N,

STX3P

A11,

A10

Differential, high-speed serial JESD204B/C output data interface, lane 3

STX4N,

STX4P

C1,

Differential, high-speed serial JESD204B/C output data interface, lane 4

STX5N,

STX5P

A2,

Differential, high-speed serial JESD204B/C output data interface, lane 5

STX6N,

STX6P

A4,

Differential, high-speed serial JESD204B/C output data interface, lane 6

STX7N,

STX7P

A7,

Differential, high-speed serial JESD204B/C output data interface, lane 7

SYNC

JESD active low SYNC input. When SYNC is low and the device is configured, the device

sends K characters on the JESD lanes.

SYSREFN,

SYSREFP

U6,

Differential SYSREF input (100Ω differential termination, self biased to 1.2V). AC and DC

coupling is supported.

TIMESTAMPN,

TIMESTAMPP

P7,

Not yet supported in software. Can be connected to GND.

VCM

T7, T12

Common mode voltage reference output. The two pins are internally shorted together.

(1)

I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.

ADC32RF72

SBASAL2 – NOVEMBER 2025

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