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TUSB1146 Datasheet(PDF) 30 Page - Texas Instruments

Part # TUSB1146
Description  TUSB1146 USB Type-C™ DisplayPort™ Alt Mode 10-Gbps Linear Redriver Crosspoint Switch
PDF  68 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TUSB1146 Datasheet(HTML) 30 Page - Texas Instruments

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TUSB1146
SLLSFB2 – APRIL 2020
www.ti.com
Product Folder Links: TUSB1146
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Copyright © 2020, Texas Instruments Incorporated
The Disconnect mode is the state in which TUSB1146 has not detected far-end termination on both upstream
facing port (UFP) or downstream facing port (DFP). The disconnect mode is the lowest power mode of each of
the four modes. The TUSB1146 remains in this mode until far-end receiver termination has been detected on
both UFP and DFP. The TUSB1146 immediately exits this mode and enter U0 once far-end termination is
detected.
Once in U0 mode, the TUSB1146 will redrive all traffic received on UFP and DFP. U0 is the highest power mode
of all USB3.1 modes. The TUSB1146 remains in U0 mode until electrical idle occurs on both UFP and DFP.
Upon detecting electrical idle, the TUSB1146 immediately transitions to U1.
The U1 mode is the intermediate mode between U0 mode and U2/U3 mode. In U1 mode, the TUSB1146 UFP
and DFP receiver termination remains enabled. The UFP and DFP transmitter DC common mode is maintained.
The power consumption in U1 is similar to power consumption of U0.
Next to the disconnect mode, the U2/U3 mode is next lowest power state. While in this mode, the TUSB1146
periodically performs far-end receiver detection. Anytime the far-end receiver termination is not detected on
either UFP or DFP, the TUSB1146 leaves the U2/U3 mode and transitions to the Disconnect mode. It also
monitors for a valid LFPS. Upon detection of a valid LFPS, the TUSB1146 immediately transitions to the U0
mode. In U2/U3 mode, the TUSB1146 receiver terminations remain enabled but the TX DC common mode
voltage is not maintained.
8.4.8 Downstream Facing Port Adaptive Equalization
The TUSB1146 implements an adaptive equalizer (AEQ) function for the USB-C downstream facing port
receivers (RX1 and RX2). The purpose of the adaptive equalizer function is determine the best EQ value such
that output jitter is minimized. The TUSB1146 provides two modes of adaptive equalization: Fast AEQ and Full
AEQ. The selection between Fast and Full AEQ is determined by a register. The AEQ feature is disabled by
default but can enabled through a register. The Fast adaptive equalization feature is supported in GPIO mode
when I2C_EN pin = "F" and !(EQ0 pin = "0" and EQ1 = "0").
NOTE
The AEQ feature is NOT supported on SSTX receiver and the DP[3:0] receivers. These
receivers only support fixed EQ.
Fast AEQ is not supported in the GPIO defined by I2C_EN = "0". It is recommended to
configure TUSB1146 for I2C mode when using adaptive EQ features as this provides the
most flexibility.
8.4.8.1 Fast Adaptive Equalization in I2C Mode
The Fast AEQ mode is used to distinguish two channels (short channel and a long channel) and choose the
appropriate receiver equalization setting for that channel. Because Fast AEQ only distinguishes between two
choices, the AEQ time is a lot shorter than Full AEQ mode which minimizes impact to USB link training.
When Fast AEQ is enabled and channel is determined to be short, the TUSB1146 will use the value
programmed into the EQx_SEL, where x = 1 or 2. If the TUSB1146 determines channel is not short, the
TUSB1146 will switch to EQ value programmed into LONG_EQx register, where x = 1 or 2. During initial system
evaluation, it is recommended to perform both short and long channel USB3.1 RX JTOL Gen2 testing and
program EQx_SEL and LONG_EQx to the value which produced the best results for each channel configuration.
The TUSB1146 will determine short and long based on the estimate eye height. The value programmed into
FASTAEQ_LIMITS register will determine the eye height limits. Software can change the defaults of this register
to lower or raise the limits.
NOTE
EQ_OVERRIDE field must be set for values programmed into EQx_SEL and LONG_EQx
to be used.
It is recommended to change the FASTAEQ_LIMITS register from the default value to 0x2
(80mV).



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