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TUSB1146 Datasheet(PDF) 42 Page - Texas Instruments |
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TUSB1146 Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 68 page ![]() 42 TUSB1146 SLLSFB2 – APRIL 2020 www.ti.com Product Folder Links: TUSB1146 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Table 18. DisplayPort_2 Register Field Descriptions (continued) Bit Field Type Reset Description 2 DP2_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 2. When AUX_SNOOP_DISABLE = 0b, changes to this field will have no effect on lane 2 functionality. 0x0 = DP Lane 2 enabled. 0x1 = DP Lane 2 disabled. 1 DP1_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 1. When AUX_SNOOP_DISABLE = 0b, changes to this field will have no effect on lane 1 functionality. 0x0 = DP Lane 1 enabled. 0x1 = DP Lane 1 disabled. 0 DP0_DISABLE R/W 0x0 When AUX_SNOOP_DISABLE = 1b, this field can be used to enable or disable DP lane 0. When AUX_SNOOP_DISABLE = 0b, changes to this field will have no effect on lane 0 functionality. 0x0 = DP Lane 0 enabled. 0x1 = DP Lane 0 disabled. 8.6.1.7 AEQ_CONTROL1 Register (Offset = 0x1C) [reset = 0xF0] AEQ_CONTROL1 is shown in Table 19. Return to the Summary Table. This register is used to enable adaptive EQ and select between Fast and Full adaptive EQ. Table 19. AEQ_CONTROL1 Register Field Descriptions Bit Field Type Reset Description 7-4 FULLAEQ_UPPER_EQ R/W 0xF Maximum EQ value to check for full AEQ mode 3 USB3_U1_DISABLE R/W 0x0 This field when set will cause entry to U3 instead of U1 when electrical idle is detected. 0x0 = U1 entry after electrical idle. 0x1 = U3 entry after electrical idle. 2-1 AEQ_MODE R/W 0x0 Selects between Fast and 2 Full Adaption modes 0x0 = Fast AEQ. 0x1 = Full AEQ with hits counted at mideye for every EQ. 0x2 = Fast AEQ. 0x3 = Full AEQ with hits counted at mideye only for EQ equal 0. 0 AEQ_EN R/W 0x0 Controls whether or not adaptive EQ for USB downstream facing port is enabled. 0x0 = AEQ disabled 0x1 = AEQ enabled 8.6.1.8 AEQ_CONTROL2 Register (Offset = 0x1D) [reset = 0x20] AEQ_CONTROL2 is shown in Table 20. Return to the Summary Table. This register allows for controls for the Fast AEQ limits as well as adding or reducing final EQ value used by the Full AEQ function. |
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