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S29GL01GS Datasheet(PDF) 39 Page - Infineon Technologies AG

Part # S29GL01GS
Description  128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash
PDF  118 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

S29GL01GS Datasheet(HTML) 39 Page - Infineon Technologies AG

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Datasheet
39
001-98285 Rev. *T
2023-07-17
128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash
Parallel, 3.0 V
Embedded operations
Figure 7
Data# Polling algorithm
5.5.2.2
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an embedded program or erase algorithm is in progress or complete, or
whether the device has entered the Program Suspend or Erase Suspend mode. Toggle Bit I may be read at any
address, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the program
or erase operation).
During an embedded program or erase algorithm operation, successive read cycles to any address cause DQ6 to
toggle. (The system may use either OE# or CE# to control the read cycles). When the operation is complete, DQ6
stops toggling.
After an erase command sequence is written, if the sector selected for erasing is protected, DQ6 toggles for
approximately 100 µs, then the EAC returns to standby (Read Mode). If the selected sector is not protected, the
embedded erase algorithm erases the unprotected sector.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or erase-suspended.
When the device is actively erasing (that is, the embedded erase algorithm is in progress), DQ6 toggles. When the
device enters the Program Suspend mode or Erase Suspend mode, DQ6 stops toggling. However, the system
must also use DQ2 to determine which sectors are erasing, or erase-suspended. Alternatively, the system can use
DQ7 (see “DQ7: Data# Polling” on page 38).
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the embedded program
algorithm is complete.
Table 15 shows the outputs for Toggle Bit I on DQ6. Figure 8 shows the toggle bit algorithm in flowchart form,
and the “Reading Toggle Bits DQ6/DQ2” on page 40 explains the algorithm. Figure 8 shows the toggle bit timing
diagrams. Figure 4 shows the differences between DQ2 and DQ6 in graphical form. See also “DQ2: Toggle Bit II”
on page 40.
START
Read DQ7-DQ0
-
FAIL
DQ7 = Data?
No
Yes
DQ5 = 1?
No
Yes
DQ7 = Data?
No
Yes
PASS
Read DQ 7 -DQ0
Note
21.DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.



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