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S29GL01GS Datasheet(PDF) 89 Page - Infineon Technologies AG |
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S29GL01GS Datasheet(HTML) 89 Page - Infineon Technologies AG |
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89 / 118 page  Datasheet 89 001-98285 Rev. *T 2023-07-17 128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash Parallel, 3.0 V Timing specifications Figure 17 Back to Back Read (tACC) Operation timing diagram Figure 18 Back to Back Read Operation (tRC) timing diagram Figure 19 Page Read timing diagram Amax-A0 CE# OE# DQ15-DQ0 tACC tOE tCE tDF tDF tOH tOH tOH Amax-A0 CE# OE# DQ15-DQ0 tRC tACC tOE tCE tDF tOH tOH Amax-A4 A3-A0 CE# OE# DQ15-DQ0 tACC tOE tCE tPACC Notes 110.Back to Back operations, in which CE# remains Low between accesses, requires an address change to initiate the second access. 111.Word Configuration: Toggle A0, A1, A2, and A3. |
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