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S29GL01GS Datasheet(PDF) 70 Page - Infineon Technologies AG

Part # S29GL01GS
Description  128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash
PDF  118 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

S29GL01GS Datasheet(HTML) 70 Page - Infineon Technologies AG

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Datasheet
70
001-98285 Rev. *T
2023-07-17
128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash
Parallel, 3.0 V
Signal protocols
9
Signal protocols
The following sections describe the host system interface signal behavior and timing for the 29GL-S family flash
devices.
9.1
Interface states
Table 49 describes the required value of each interface signal for each interface state.
Legend:
L = VIL
H = VIH
X = either VIL or VIH
L/H = rising edge
H/L = falling edge
Valid = all bus signals have stable L or H level
Modified = valid state different from a previous valid state
Available = read data is internally stored with output driver controlled by OE#
Table 49
Interface states
Interface state
VCC
VIO
RESET# CE# OE# WE# AMAX–A0 DQ15–DQ0
Power-Off with Hardware Data
Protection
< VLKO
 VCC
X
XXX
X
High-Z
Power-On (Cold) Reset
 VCC min  VIO min
 VCC
X
XXX
X
High-Z
Hardware (Warm) Reset
 VCC min  VIO min
 VCC
L
XXX
X
High-Z
Interface Standby
 VCC min  VIO min
 VCC
HH
X
X
X
High-Z
Automatic Sleep[70, 71]
 VCC min  VIO min
 VCC
H
L
X
X
Valid
Output
available
Read with Output Disable[72]
 VCC min  VIO min
 VCC
HL
H
H
Valid
High-Z
Random Read
 VCC min  VIO min
H
L
L
H
Valid
Output valid
Page Read
 VCC min  VIO min
 VCC
HL
L
H
AMAX–A4
valid
A3–A0
modified
Output valid
Write
 VCC min  VIO min
 VCC
H
L
H
L
Valid
Input valid
Notes
70.WE# and OE# can not be at VIL at the same time.
71.Automatic Sleep is a read/write operation where data has been driven on the bus for an extended period,
without CE# going HIGH and the device internal logic has gone into standby mode to conserve power.
72.Read with Output Disable is a read initiated with OE# HIGH.



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