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S29GL01GS Datasheet(PDF) 45 Page - Infineon Technologies AG

Part # S29GL01GS
Description  128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash
PDF  118 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

S29GL01GS Datasheet(HTML) 45 Page - Infineon Technologies AG

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Datasheet
45
001-98285 Rev. *T
2023-07-17
128 Mb/256 Mb/512 Mb/1 Gb GL-S MIRRORBIT™ Flash
Parallel, 3.0 V
Embedded operations
5.6.3
Write buffer abort
If an error occurs during a Write to Buffer command the device (EAC) remains busy. The RY/BY# output remains
LOW, data polling status continues to be overlaid on all address locations, and the status register shows ready
with valid status bits. The device remains busy until the error status is detected by the host system status
monitoring and the error status is cleared.
During write to buffer abort (WBA) error status the Data Polling status will show the following:
• DQ7 is the inversion of the DQ7 bit in the last word loaded into the write buffer
• DQ6 continues to toggle, independent of the address used to read status
• DQ5 = 0; to indicate no failure of the programming operation. WBA is an error in the values input by the Write
to Buffer command before the programming operation can begin
• DQ4 is RFU and should be treated as don’t care (masked)
• DQ3 is don’t care after program operation as no erase is in progress. If the Write Buffer Program operation was
started after an erase operation had been suspended then DQ3 = 1. If there was no erase operation in progress
then DQ3 is a don’t care and should be masked.
• DQ2 does not toggle after program operation as no erase is in progress. If the Write Buffer Program operation
was started after an erase operation had been suspended then DQ2 will toggle in the sector where the erase
operation was suspended and not in any other sector. If there was no erase operation in progress then DQ2 is
a don’t care and should be masked.
• DQ1 = 1: Write buffer abort error
• DQ0 is RFU and should be treated as don’t care (masked)
During embedded algorithm error status the Status Register will show the following:
• SR[7] = 1; Valid status displayed
• SR[6] = X; May or may not be erase suspended during the WBA error status
• SR[5] = 0; Erase successful
• SR[4] = 1; Programming related error
• SR[3] = 1; Write buffer abort
• SR[2] = 0; No Program in suspension
• SR[1] = 0; Sector not locked during operation
• SR[0] = X; RFU, treat as don’t care (masked)
When the WBA error status is detected, it is necessary to clear the error status in order to return to normal
operation, with RY/BY# HIGH, ready for a new read or command write. The error status can be cleared and device
returned to normal operation by writing:
• Write Buffer Abort Reset command
- Clears the status register and returns to normal operation
• Status Register Clear command
Commands that are accepted during embedded algorithm error status are:
• Status Register Read
• Write Buffer Abort Reset command
• Status Register Clear command



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