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OMAP3530 Datasheet(PDF) 39 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 39 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-2. Ball Characteristics (CUS Pkg.)(1) (continued)
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
safe_mode
7
H1
gpmc_a8
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_41
4
IO
safe_mode
7
H2
gpmc_a9
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
sys_
1
I
ndmareq2
gpio_42
4
IO
safe_mode
7
G2
gpmc_a10
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
sys_
1
I
ndmareq3
gpio_43
4
IO
safe_mode
7
L2
gpmc_d0
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
M1
gpmc_d1
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
M2
gpmc_d2
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
N2
gpmc_d3
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
M3
gpmc_d4
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
P1
gpmc_d5
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
P2
gpmc_d6
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
R1
gpmc_d7
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
R2
gpmc_d8
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_44
4
IO
safe_mode
7
T2
gpmc_d9
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_45
4
IO
safe_mode
7
U1
gpmc_d10
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_46
4
IO
safe_mode
7
R3
gpmc_d11
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_47
4
IO
safe_mode
7
T3
gpmc_d12
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_48
4
IO
safe_mode
7
U2
gpmc_d13
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_49
4
IO
safe_mode
7
V1
gpmc_d14
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_50
4
IO
safe_mode
7
V2
gpmc_d15
0
IO
H
H
0
VDDS_ MEM
Yes
4
PU/ PD
LVCMOS
gpio_51
4
IO
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TERMINAL DESCRIPTION
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