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OMAP3530 Datasheet(PDF) 16 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 16 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
safe_mode
7
U8
NA
gpmc_ncs3
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
sys_
1
I
ndmareq0
gpio_54
4
IO
safe_mode
7
T8
NA
gpmc_ncs4
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
sys_
1
I
ndmareq1
mcbsp4_
2
IO
clkx
gpt9_pwm_
3
IO
evt
gpio_55
4
IO
safe_mode
7
R8
NA
gpmc_ncs5
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
sys_
1
I
ndmareq2
mcbsp4_dr
2
I
gpt10_pwm
3
IO
_evt
gpio_56
4
IO
safe_mode
7
P8
NA
gpmc_ncs6
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
sys_
1
I
ndmareq3
mcbsp4_dx
2
IO
gpt11_pwm
3
IO
_evt
gpio_57
4
IO
safe_mode
7
N8
NA
gpmc_ncs7
0
O
H
H
7
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
gpmc_io_dir
1
O
mcbsp4_fsx
2
IO
gpt8_pwm_
3
IO
evt
gpio_58
4
IO
safe_mode
7
T4
W2
gpmc_clk
0
O
L
0
0
VDDS_ MEM
Yes
4
PU/
LVCMOS
PD
gpio_59
4
IO
safe_mode
7
F3
W1
gpmc_nadv
0
O
0
0
0
VDDS_ MEM
No
4
NA
LVCMOS
_ale
G2
V2
gpmc_noe
0
O
1
1
0
VDDS_ MEM
No
4
NA
LVCMOS
F4
V1
gpmc_nwe
0
O
1
1
0
VDDS_ MEM
No
4
NA
LVCMOS
G3
AC12
gpmc_nbe0
0
O
L
0
0
VDDS_ MEM
Yes
4
PU/
LVCMOS
_cle
PD
gpio_60
4
IO
TERMINAL DESCRIPTION
16
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