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OMAP3530 Datasheet(PDF) 22 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 22 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
AG18
NA
gpio_114
4
I
L
L
7
VDDS
Yes
4
PD
LVDS/
CMOS
safe_mode
7
AH18
NA
gpio_115
4
I
L
L
7
VDDS
Yes
4
PD
LVDS/
CMOS
safe_mode
7
P21
NA
mcbsp2_fsx
0
IO
PGM
L
7
VDDS
Yes
4(2)
PU/
LVCMOS
PD
gpio_116
4
IO
safe_mode
7
N21
NA
mcbsp2_
0
IO
PGM
L
7
VDDS
Yes
4(2)
PU/
LVCMOS
clkx
PD
gpio_117
4
IO
safe_mode
7
R21
NA
mcbsp2_dr
0
I
PGM
L
7
VDDS
Yes
4(2)
PU/
LVCMOS
PD
gpio_118
4
IO
safe_mode
7
M21
NA
mcbsp2_dx
0
IO
PGM
L
7
VDDS
Yes
4(2)
PU/
LVCMOS
PD
gpio_119
4
IO
safe_mode
7
N28
NA
mmc1_clk
0
O
L
L
7
MMC1_
Yes
8
PU/
LVCMOS
VDDS
PD
ms_clk
1
O
gpio_120
4
IO
safe_mode
7
M27
NA
mmc1_cmd
0
IO
L
L
7
MMC1_
Yes
8
PU/
LVCMOS
VDDS
PD
ms_bs
1
O
gpio_121
4
IO
safe_mode
7
N27
NA
mmc1_dat0
0
IO
L
L
7
MMC1_
Yes
8
PU/
LVCMOS
VDDS
PD
ms_dat0
1
IO
gpio_122
4
IO
safe_mode
7
N26
NA
mmc1_dat1
0
IO
L
L
7
MMC1_
Yes
8
PU/
LVCMOS
VDDS
PD
ms_dat1
1
IO
gpio_123
4
IO
safe_mode
7
N25
NA
mmc1_dat2
0
IO
L
L
7
MMC1_
Yes
8
PU/
LVCMOS
VDDS
PD
ms_dat2
1
IO
gpio_124
4
IO
safe_mode
7
P28
NA
mmc1_dat3
0
IO
L
L
7
MMC1_
Yes
8
PU/
LVCMOS
VDDS
PD
ms_dat3
1
IO
gpio_125
4
IO
safe_mode
7
P27
NA
mmc1_dat4
0
IO
L
L
7
VDDS
No
8
PD
LVCMOS
gpio_126
4
IO
TERMINAL DESCRIPTION
22
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