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OMAP3530 Datasheet(PDF) 32 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 32 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
safe_mode
7
AG26
NA
sys_boot1
0
I
Z
Z
0
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_3
4
IO
safe_mode
7
AE14
NA
sys_boot2
0
I
Z
Z
0
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_4
4
IO
safe_mode
7
AF18
NA
sys_boot3
0
I
Z
Z
0
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_5
4
IO
safe_mode
7
AF19
NA
sys_boot4
0
I
Z
Z
0
VDDS
Yes
4
PU/
LVCMOS
PD
mmc2_dir_
1
O
dat2
gpio_6
4
IO
safe_mode
7
AE21
NA
sys_boot5
0
I
Z
Z
0
VDDS
Yes
4
PU/
LVCMOS
PD
mmc2_dir_
1
O
dat3
gpio_7
4
IO
safe_mode
7
AF21
NA
sys_boot6
0
I
Z
Z
0
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_8
4
IO
safe_mode
7
AF22
NA
sys_off_
0
O
0
L
7
VDDS
Yes
4
PU/
LVCMOS
mode
PD
gpio_9
4
IO
safe_mode
7
AG25
NA
sys_clkout1
0
O
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_10
4
IO
safe_mode
7
AE22
NA
sys_clkout2
0
O
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_186
4
IO
safe_mode
7
B1
NA
sys_
0
AI
Z
AI
NA
VDDS
NA
NA
NA
Analog
ipmcsws
A1
NA
sys_
0
AO
0
AO
NA
VDDS
No
NA
NA
LVCMOS
opmcsws
AA17
NA
jtag_ntrst
0
I
L
L
0
VDDS
Yes
NA
PU/
LVCMOS
PD
AA13
NA
jtag_tck
0
I
L
L
0
VDDS
Yes
NA
PU/
LVCMOS
PD
AA12
NA
jtag_rtck
0
O
L
0
0
VDDS
Yes
4
PU/
LVCMOS
PD
AA18
NA
jtag_tms_tm
0
IO
H
H
0
VDDS
Yes
4
PU/
LVCMOS
sc
PD
AA20
NA
jtag_tdi
0
I
H
H
0
VDDS
Yes
NA
PU/
LVCMOS
PD
TERMINAL DESCRIPTION
32
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