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OMAP3530 Datasheet(PDF) 28 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 28 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
safe_mode
7
H21
NA
uart3_tx_
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
irtx
PD
gpio_166
4
IO
safe_mode
7
T28
NA
hsusb0_clk
0
I
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_120
4
IO
safe_mode
7
T25
NA
hsusb0_stp
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_121
4
IO
safe_mode
7
R28
NA
hsusb0_dir
0
I
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_122
4
IO
safe_mode
7
T26
NA
hsusb0_nxt
0
I
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_124
4
IO
safe_mode
7
T27
NA
hsusb0_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
data0
PD
uart3_tx_
2
O
irtx
gpio_125
4
IO
safe_mode
7
U28
NA
hsusb0_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
data1
PD
uart3_rx_
2
I
irrx
gpio_130
4
IO
safe_mode
7
U27
NA
hsusb0_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
data2
PD
uart3_rts_
2
O
sd
gpio_131
4
IO
safe_mode
7
U26
NA
hsusb0_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
data3
PD
uart3_cts_
2
IO
rctx
gpio_169
4
IO
safe_mode
7
U25
NA
hsusb0_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
data4
PD
gpio_188
4
IO
safe_mode
7
V28
NA
hsusb0_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
data5
PD
gpio_189
4
IO
TERMINAL DESCRIPTION
28
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