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OMAP3530 Datasheet(PDF) 25 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 25 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
AF5
NA
mcbsp3_
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
clkx
PD
uart2_tx
1
O
gpio_142
4
IO
hsusb3_tll_
5
IO
data6
safe_mode
7
AE5
NA
mcbsp3_fsx
0
IO
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
uart2_rx
1
I
gpio_143
4
IO
hsusb3_tll_
5
IO
data7
safe_mode
7
AB26
NA
uart2_cts
0
I
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
mcbsp3_dx
1
IO
gpt9_pwm_
2
IO
evt
gpio_144
4
IO
safe_mode
7
AB25
NA
uart2_rts
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
mcbsp3_dr
1
I
gpt10_pwm
2
IO
_evt
gpio_145
4
IO
safe_mode
7
AA25
NA
uart2_tx
0
O
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
mcbsp3_
1
IO
clkx
gpt11_pwm
2
IO
_evt
gpio_146
4
IO
safe_mode
7
AD25
NA
uart2_rx
0
I
H
H
7
VDDS
Yes
4
PU/
LVCMOS
PD
mcbsp3_fsx
1
IO
gpt8_pwm_
2
IO
evt
gpio_147
4
IO
safe_mode
7
AA8
NA
uart1_tx
0
O
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_148
4
IO
safe_mode
7
AA9
NA
uart1_rts
0
O
L
L
7
VDDS
Yes
4
PU/
LVCMOS
PD
gpio_149
4
IO
safe_mode
7
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TERMINAL DESCRIPTION
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