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OMAP3530 Datasheet(PDF) 18 Page - Texas Instruments

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Part # OMAP3530
Description  Applications Processor
PDF  230 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OMAP3530 Datasheet(HTML) 18 Page - Texas Instruments

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OMAP3530/25 Applications Processor
SPRS507 – FEBRUARY 2008
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL
PIN
MODE
TYPE
BALL
BALL
RESET
POWER [9]
HYS
BUFFER
PULL
IO
BOTTOM
TOP
NAME [3]
[4]
[5]
RESET
RESET
REL.
[10]
STRENGTH
U/D
CELL [13]
[1]
[2]
STATE
REL.
MODE
(mA) [11]
TYPE
[6]
STATE
[8]
[12]
[7]
AH23
NA
dss_data3
0
IO
L
L
7
VDDS
No
4
PU/
LVDS/
PD
CMOS
gpio_73
4
IO
safe_mode
7
AG24
NA
dss_data4
0
IO
L
L
7
VDDS
No
4
PU/
LVDS/
PD
CMOS
uart3_rx_
2
I
irrx
gpio_74
4
IO
safe_mode
7
AH24
NA
dss_data5
0
IO
L
L
7
VDDS
No
4
PU/
LVDS/
PD
CMOS
uart3_tx_
2
O
irtx
gpio_75
4
IO
safe_mode
7
E26
NA
dss_data6
0
IO
L
L
7
VDDS
Yes
8
PU/
LVCMOS
PD
uart1_tx
2
O
gpio_76
4
IO
safe_mode
7
F28
NA
dss_data7
0
IO
L
L
7
VDDS
Yes
8
PU/
LVCMOS
PD
uart1_rx
2
I
gpio_77
4
IO
safe_mode
7
F27
NA
dss_data8
0
IO
L
L
7
VDDS
Yes
8
PU/
LVCMOS
PD
gpio_78
4
IO
safe_mode
7
G26
NA
dss_data9
0
IO
L
L
7
VDDS
Yes
8
PU/
LVCMOS
PD
gpio_79
4
IO
safe_mode
7
AD28
NA
dss_data10
0
IO
L
L
7
VDDS
NA
4
PU/
LVDS/
PD
CMOS
gpio_80
4
IO
safe_mode
7
AD27
NA
dss_data11
0
IO
L
L
7
VDDS
NA
4
PU/
LVDS/
PD
CMOS
gpio_81
4
IO
safe_mode
7
AB28
NA
dss_data12
0
IO
L
L
7
VDDS
NA
4
PU/
LVDS/
PD
CMOS
gpio_82
4
IO
safe_mode
7
AB27
NA
dss_data13
0
IO
L
L
7
VDDS
NA
4
PU/
LVDS/
PD
CMOS
gpio_83
4
IO
safe_mode
7
TERMINAL DESCRIPTION
18
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