C8051F310 datasheet(140/228 Pages) SILABS

140 / 228 page

C8051F310/1/2/3/4/5/6/7

140

Rev. 1.7

SFR Definition 13.11. P2: Port2

SFR Definition 13.12. P2MDIN: Port2 Input Mode

Bits7–0: P2.[7:0]

Write - Output appears on I/O pins per Crossbar Registers.

0: Logic Low Output.

1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).

Read - Always reads ‘1’ if selected as analog input in register P2MDIN. Directly reads Port

pin when configured as digital input.

0: P2.n pin is logic low.

1: P2.n pin is logic high.

Note:

Only P2.0–P2.5 are associated with Port pins on the C8051F316/7 devices.

R/W

Reset Value

P2.7

P2.6

P2.5

P2.4

P2.3

P2.2

P2.1

P2.0

11111111

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address:

(bit addressable)

0xA0

Bits7–0: Analog Input Configuration Bits for P2.7–P2.0 (respectively).

Port pins configured as analog inputs have their weak pullup, digital driver, and digital

receiver disabled.

0: Corresponding P2.n pin is configured as an analog input.

1: Corresponding P2.n pin is not configured as an analog input.

Note:

Only P2.0–P2.5 are associated with Port pins on the C8051F316/7 devices.

R/W

Reset Value

11111111

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

SFR Address:

0xF3

C8051F310 Datasheet(PDF) 140 Page - Silicon Laboratories

C8051F310 Datasheet(HTML) 140 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL