CS5460 datasheet(14/34 Pages) CIRRUS

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CS5460

DS279PP5

3. SERIAL PORT OVERVIEW

The CS5460’s serial port incorporates a state ma-

chine with transmit/receive buffers. The state ma-

chine interprets 8 bit command words on the rising

edge of SCLK. Upon decoding of the command

word the state machine performs the requested

command or prepares for a data transfer of the ad-

dressed register. Request for a read requires an in-

ternal register transfer to the transmit buffer, while

a write waits until the completion of 24 SCLKs be-

fore performing a transfer. The internal registers

are used to control the ADC’s functions. All regis-

ters are 24-bits in length. Figure 9 depicts the inter-

nal registers available to the user.

After system initialization or reset, the serial port

state machine is initialized into command mode

where it waits to receive a valid command (the first

8-bits clocked into the serial port). Upon receiving

and decoding a valid command word the state ma-

chine instructs the converter to either perform a

system operation, or transfer data to or from an in-

ternal register. The Command Word section can be

used to decode all valid commands.

The state machine decodes the command word as it

is received. The serial port enters data transfer

mode if the MSB of the command word is logic 0

(B7 = 0). In data transfer mode, the internal regis-

ters are read from or written to. Command words

instructing a register write must be followed by 24

bits of data. For instance, to write the configuration

(0x40) to initiate the write. The ADC would then

acquire the serial data input from the (SDI) pin

when the user pulses the serial clock (SCLK) 24

times. Once the data is received the state machine

would write the data to the configuration register

and return to the command mode. Command words

instructing a register read may be terminated at

8-bit boundaries (e.g., read transfers may be 8, 16,

or 24 bits in length). Also data register reads allow

“command chaining”. For example, a command

word instructs the state machine to read a signed

output register. After the user pulses SCLK for

16-bits of data, a write command word (e.g., to

clear the status register) may be pulsed on to the

SDI line at the same time the remaining 8-bits of

data are pulsed from the SDO line.

Current

Channel

Voltage

Channel

Cycle-Counter Register (1 × 24)

Gain Register (1 × 24)

Configuration Register (1 × 24)

Status Register (1 × 24)

Serial Interface

Pulse-Rate Register (1 × 24)

Mask Register (1 × 24)

Timebase Register (1 × 24)

Offset Register (1 × 24)

Unsigned Output Registers (2 × 24)

, V

)

Command Word

State Machine

Transmit Buffer

Receive Buffer

Signed Output Registers (4 × 24)

(I, V, P, E)

RMS

24-Bit

SDI

SDO

SCLK

INT

Figure 9. CS5460 Register Diagram

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