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ECP2 Datasheet(PDF) 47 Page - Lattice Semiconductor |
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ECP2 Datasheet(HTML) 47 Page - Lattice Semiconductor |
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47 / 386 page ![]() 2-44 Architecture Lattice Semiconductor LatticeECP2/M Family Data Sheet Table 2-13. Supported Input Standards Input Standard VREF (Nom.) VCCIO 1 (Nom.) Single Ended Interfaces LVTTL — — LVCMOS33 — — LVCMOS25 — — LVCMOS18 — 1.8 LVCMOS15 — 1.5 LVCMOS12 — — PCI 33 — 3.3 HSTL18 Class I, II 0.9 — HSTL15 Class I 0.75 — SSTL3 Class I, II 1.5 — SSTL2 Class I, II 1.25 — SSTL18 Class I, II 0.9 — Differential Interfaces Differential SSTL18 Class I, II — — Differential SSTL2 Class I, II — — Differential SSTL3 Class I, II — — Differential HSTL15 Class I — — Differential HSTL18 Class I, II — — LVDS, MLVDS, LVPECL, BLVDS, RSDS — — 1 When not specified, VCCIO can be set anywhere in the valid operating range (page 3-1). |
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