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ECP2 Datasheet(PDF) 90 Page - Lattice Semiconductor |
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ECP2 Datasheet(HTML) 90 Page - Lattice Semiconductor |
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90 / 386 page  3-38 DC and Switching Characteristics Lattice Semiconductor LatticeECP2/M Family Data Sheet SERDES High Speed Data Transmitter (LatticeECP2M Family Only) 1, 2 Table 3-7. Serial Output Timing and Levels Table 3-8. Channel Output Jitter Symbol Description Frequency Min. Typ. Max. Units VTX-DIFF-P-P-1.25 Differential swing (1.25V setting) 1, 2 0.25 to 3.125 Gbps — 1.25 — V, p-p VTX-DIFF-P-P-1.4 Differential swing (1.4V setting) 1, 2 0.25 to 3.125 Gbps — 1.4 — V, p-p VTX-DIFF-P-P-1.0 Differential swing (1.0V setting) 1, 2 0.25 to 3.125 Gbps — 1.0 — V, p-p VTX-DIFF-P-P-1.2 Differential swing (1.2V setting) 1, 2 0.25 to 3.125 Gbps — 1.2 — V, p-p VOCM Output common mode voltage — — 0.8 — V TTX-R Rise time (20% to 80%) — — 70 — ps TTX-F Fall time (80% to 20%) — — 70 — ps ZTX-OI-SE Output Impedance 50/75/HiZ K Ohms (single ended) —— 50/75 HiZ — Ohms RLTX-RL Return loss (with package) — — 9 — dB 1. All measurements are with 50 ohm impedance. 2. See technical note TN1124, LatticeECP2/M SERDES/PCS Usage Guide for actual binary settings and the min-max range. Description Frequency Min. Typ. Max. Units Deterministic 3.125 Gbps — 0.08 0.12 UI, p-p Random 3.125 Gbps — 0.22 0.38 UI, p-p Total 3.125 Gbps — 0.33 0.43 UI, p-p Deterministic 2.5Gbps — 0.05 0.11 UI, p-p Random 2.5Gbps — 0.17 0.30 UI, p-p Total 2.5Gbps — 0.24 0.39 UI, p-p Deterministic 1.25 Gbps — 0.03 0.11 UI, p-p Random 1.25 Gbps — 0.10 0.18 UI, p-p Total 1.25 Gbps — 0.15 0.29 UI, p-p Deterministic 250 Mbps — 0.04 0.17 UI, p-p Random 250 Mbps — 0.12 0.13 UI, p-p Total 250 Mbps — 0.15 0.29 UI, p-p Note: Values are measured with PRBS 2 7-1, all channels operating, FPGA Logic active, I/Os around SERDES pins quiet, reference clock @ 10X mode. |
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