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ECP2 Datasheet(PDF) 173 Page - Lattice Semiconductor

Part # ECP2
Description  LatticeECP2/M Family Data Sheet
PDF  386 Pages
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

ECP2 Datasheet(HTML) 173 Page - Lattice Semiconductor

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Pinout Information
Lattice Semiconductor
LatticeECP2/M Family Data Sheet
N10
GND
-
GND
-
N11
GND
-
GND
-
N12
GND
-
GND
-
N13
GND
-
GND
-
N15
GND
-
GND
-
N8
GND
-
GND
-
P14
GND
-
GND
-
P20
GND
-
GND
-
P3
GND
-
GND
-
P9
GND
-
GND
-
R10
GND
-
GND
-
R11
GND
-
GND
-
R12
GND
-
GND
-
R13
GND
-
GND
-
U17
GND
-
GND
-
U6
GND
-
GND
-
W2
GND
-
GND
-
W21
GND
-
GND
-
Y14
GND
-
GND
-
Y9
GND
-
GND
-
A1
GND
-
GND
-
N18
VCCPLL
-
VCCPLL
-
K6
NC
-
VCCPLL
-
N6
VCCPLL
-
VCCPLL
-
J16
NC
-
VCCPLL
-
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
***Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one
connection with a package ball or pin.
LFE2-35E/SE and LFE2-50E/SE Logic Signal Connections: 484 fpBGA
LFE2-35E/SE
LFE2-50E/SE
Ball
Number
Ball/Pad
Function
Bank
Dual Function
Differential
Ball/Pad
Function
Bank
Dual Function
Differential



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