ECP2 datasheet(191/386 Pages) LATTICE

191 / 386 page

4-90

Pinout Information

Lattice Semiconductor

LatticeECP2/M Family Data Sheet

U11

GND

U13

GND

U14

GND

U16

GND

U17

GND

V13

GND

V14

GND

V21

GND

P24

* Supports true LVDS. Other differential signals must be emulated with external resistors.

** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.

***Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.

Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the

last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one

connection with a package ball or pin.

LFE2-20E/SE and LFE2-35E/SE Logic Signal Connections: 672 fpBGA

LFE2-20E/20SE

LFE2-35E/35SE

Ball

Number

Ball/Pad

Function

Bank

Dual Function

Differential

Ball/Pad

Function

Bank

Dual Function

Differential

ECP2 Datasheet(PDF) 191 Page - Lattice Semiconductor

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