SH7672 datasheet(427/1292 Pages) RENESAS

427 / 1292 page

Section 12 Ethernet Controller (EtherC)

Rev. 1.00 Nov. 14, 2007 Page 401 of 1262

REJ09B0437-0100

Bit

Bit Name

Initial

Value

R/W

Description

PFR

R/W

PAUSE Frame Receive Mode

0: PAUSE frame is not transferred to the E-DMAC

1: PAUSE frame is transferred to the E-DMAC

RXF

R/W

Receive Flow Control Operating Mode

0: PAUSE frame detection function is disabled

1: Receive flow control function is enabled

TXF

R/W

Transmit Flow Control Operating mode

0: Transmit flow control function is disabled

1: Transmit flow control function is enabled

15 to 13



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

PRCEF

R/W

Permit Receive CRC Error Frame

0: A frame with a CRC error is received as a frame

with an error.

1: A frame with a CRC error is received as a frame

without an error.

For a frame with an error, a CRC error is reflected in

the ECSR of the E-DMAC and the status of the receive

descriptor. For a frame without an error, the frame is

received as normal frame.

11, 10



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

MPDE

R/W

Magic Packet Detection Enable

Enables or disables Magic Packet detection by

hardware to allow activation from the Ethernet.

0: Magic Packet detection is not enabled

1: Magic Packet detection is enabled

8, 7



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

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