SH7672 datasheet(490/1292 Pages) RENESAS

490 / 1292 page

Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 1.00 Nov. 14, 2007 Page 464 of 1262

REJ09B0437-0100

13.2.19

Receive Data Padding Setting Register (RPADIR)

RPADIR is a 32-bit readable/writable register that performs the padding of receive data. Before

setting this register again, reset the software with the SWR bit in the E-DMAC mode register

(EDMR).

Bit:

Initial Value:

R/W:

Bit:

Initial Value:

R/W:

0000000000000000

RRRRRRRRRRRRRR

R/W

0000000000000000

RRRRRRRRRR

R/W



PADS1 PADS0



PADR[5:0]

Bit

Bit Name

Initial

value

R/W

Description

31 to 18



All 0



Reserved

These bits are always read as 0. The write value

should always be 0.

PADS1

PADS0

R/W

Padding size

00: No padding

01: Padding of one byte

10: Padding of two bytes

11: Padding of three bytes

15 to 6



All 0



Reserved

These bits are always read as 0. The write value

should always be 0.

5 to 0

PADR[5:0]

000000

R/W

Padding Range

H'00: Data equivalent to the padding size is inserted in

the first byte.

H'01: Data equivalent to the padding size is inserted in

the second byte.

H'3E: Data equivalent to the padding size is inserted in

the 63rd byte.

H'3F: Data equivalent to the padding size is inserted in

the 64th byte.

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