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SH7672 Datasheet(PDF) 487 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 487 Page - Renesas Technology Corp

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Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Rev. 1.00 Nov. 14, 2007 Page 461 of 1262
REJ09B0437-0100
13.2.15
Receiving-Descriptor Fetch Address Register (RDFAR)
RDFAR stores the descriptor start address that is required when the E-DMAC fetches descriptor
information from the receiving descriptor. Which receiving descriptor information is used for
processing by the E-DMAC can be recognized by monitoring addresses displayed in this register.
The address from which the E-DMAC is actually fetching a descriptor may be different from the
value read from this register.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Bit:
Initial Value:
R/W:
Bit:
Initial Value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0000000000000000
0000000000000000
RDFA[31:16]
RRRRRRRRRRRRRRRR
RRRRRRRRRRRRRRRR
RDFA[15:0]
Bit
Bit Name
Initial value R/W
Description
31 to 0 RDFA[31:0] All 0
R
Receiving-Descriptor Fetch Address
These bits can only be read. Writing is prohibited.
13.2.16
Transmission-Buffer Read Address Register (TBRAR)
TBRAR stores the address of the transmission buffer when the E-DMAC reads data from the
transmission buffer. Which addresses in the transmission buffer are processed by the E-DMAC
can be recognized by monitoring addresses displayed in this register. The address from which the
E-DMAC is actually reading in the buffer may be different from the value read from this register.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Bit:
Initial Value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit:
Initial Value:
R/W:
0000000000000000
0000000000000000
TBRA[31:16]
RRRRRRRRRRRRRRRR
RRRRRRRRRRRRRRRR
TBRA[15:0]
Bit
Bit Name
Initial value R/W
Description
31 to 0 TBRA[31:0] All 0
R
Transmission-Buffer Read Address
These bits can only be read. Writing is prohibited.



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