SH7672 datasheet(486/1292 Pages) RENESAS

486 / 1292 page

Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 1.00 Nov. 14, 2007 Page 460 of 1262

REJ09B0437-0100

Bit

Bit Name

Initial

value

R/W

Description

EDH

R/W

E-DMAC Halted

0: The E-DMAC is operating normally

1: The E-DMAC has been halted by NMI pin assertion.

E-DMAC operation is restarted by writing 0



Reserved

This bit is always read as 0. The write value should

always be 0.

13.2.14

Receiving-Buffer Write Address Register (RBWAR)

RBWAR stores the address of data to be written in the receiving buffer when the E-DMAC writes

data to the receiving buffer. Which addresses in the receiving buffer are processed by the E-

DMAC can be recognized by monitoring addresses displayed in this register. The address that the

E-DMAC is actually processing may be different from the value read from this register.

Bit:

Initial Value:

R/W:

Bit:

Initial Value:

R/W:

0000000000000000

RRRRRRRRRRRRRRRR

0000000000000000

RRRRRRRRRRRRRRRR

RBWA[31:16]

RBWA[15:0]

Bit

Bit Name

Initial

value

R/W

Description

31 to 0

RBWA[31:0] All 0

Receiving-Buffer Write Address

These bits can only be read. Writing is prohibited.

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