SH7672 datasheet(133/1292 Pages) RENESAS

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Section 5 Exception Handling

Rev. 1.00 Nov. 14, 2007 Page 107 of 1262

REJ09B0437-0100

Section 5 Exception Handling

5.1

Overview

5.1.1

Types of Exception Handling and Priority

Exception handling is started by sources, such as resets, address errors, register bank errors,

interrupts, and instructions. Table 5.1 shows their priorities. When several exception handling

sources occur at once, they are processed according to the priority shown.

Table 5.1

Types of Exception Handling and Priority Order

Type

Exception Handling

Priority

Power-on reset

Reset

Manual reset

CPU address error

Address

error

DMAC address error

FPU exception

Integer division exception (division by zero)

Instruction

Integer division exception (overflow)

Bank underflow

bank error

Bank overflow

NMI

User break

H-UDI

IRQ

Direct memory access controller (DMAC)

USB2.0 host/function module (USB)

Compare match timer (CMT)

Bus state controller (BSC)

Watchdog timer (WDT)

Host interface (HIF)

Interrupt

On-chip peripheral modules

Encryption/decryption and forward error

correction core conjunction DMAC (A-

DMAC)

High

Low

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