38K0 datasheet(16/328 Pages) RENESAS

16 / 328 page

Rev.2.00

Oct 05, 2006

page 12 of 13

38K0 Group

REJ09B0337-0200

List of tables

CHAPTER 1 HARDWARE

Table 1 Pin description ................................................................................................................... 4

Table 2 List of 38K0 group products (L version) ....................................................................... 6

Table 3 Push and pop instructions of accumulator or processor status register .................. 8

Table 4 Set and clear instructions of each bit of processor status register .......................... 9

Table 5 I/O ports functions .......................................................................................................... 13

Table 6 Interrupt vector addresses and priority ........................................................................ 17

Table 7 USB interrupt sources .................................................................................................... 30

Table 8 Summary of 38K0 group’s flash memory version ...................................................... 82

Table 9 List of software commands (CPU rewrite mode) ....................................................... 87

Table 10 Definition of each bit in status register ..................................................................... 89

Table 11 Description of pin function (Standard Serial I/O Mode) .......................................... 95

Table 12 Software commands (Standard serial I/O mode) ..................................................... 97

Table 13 Status register (SRD) ................................................................................................. 104

Table 14 Status register 1 (SRD1) ........................................................................................... 104

Table 15 Relative formula for a reference voltage VREF of A/D converter and Vref ...... 111

Table 16 Change of AD conversion register during A/D conversion ................................... 111

CHAPTER 2 APPLICATION

Table 2.1.1 Handling of unused pins ............................................................................................. 5

Table 2.2.1 Interrupt sources, vector addresses and priority of 38K0 group ......................... 11

Table 2.2.2 List of interrupt bits according to interrupt source ................................................ 16

Table 2.3.1 CNTR0 active edge selection bit function ............................................................... 25

Table 2.4.1 Setting examples of Baud rate generator values and transfer bit rate values . 61

Table 2.10.1 PLL operation mode selection bits setting example ........................................... 85

Table 2.10.2 USB clock division ratio selection bits setting example ..................................... 86

Table 2.11.1 Example of internal clock f(f) generation using main clock f(XIN) ..................... 91

Table 2.11.2 Example of internal clock f(f) generation using fSYN ........................................ 92

Table 2.12.1 State in stop mode .................................................................................................. 95

Table 2.12.2 State in wait mode ................................................................................................... 99

Table 2.13.1 Setting of programmers when parallel programming ........................................ 104

Table 2.13.2 Connection example to flash programmer when serial programming (4 wires) ..

................................................................................................................................ 104

Table 2.13.3 Setting condition in serial I/O mode .................................................................. 106

List of tables

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