38K2 datasheet(309/358 Pages) RENESAS

309 / 358 page

3.4 List of registers

Rev.2.00

Oct 15, 2006

page 48 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

Fig. 3.4.25 Structure of EP01 control register 2

B0VAL01

b7:b1

–

EP01 control register 2 (EP01CON2) [address 001B16]

Bit name

Bit symbol

At reset

Function

H/W

S/W

–: State remaining

Buffer 0 enable bit

Not used

When the selected endpoint is IN, writing “1” to this bit

makes the transmitting data a set state (SIE is possible

to read).

When the selected endpoint is OUT, writing “1” to this

bit makes data reception possible (SIE is possible to

write).

Write “0” when writing.

“0” is read when reading.

Fig. 3.4.26 Structure of EP02 control register 2

Fig. 3.4.27 Structure of EP03 control register 2

B0VAL02

b7:b1

–

EP02 control register 2 (EP02CON2) [address 001B16]

Bit name

Bit symbol

At reset

Function

H/W

S/W

–: State remaining

Buffer 0 enable bit

Not used

When the selected endpoint is IN, writing “1” to this bit

makes the transmitting data a set state (SIE is possible

to read).

When the selected endpoint is OUT, writing “1” to this

bit makes data reception possible (SIE is possible to

write).

Write “0” when writing.

“0” is read when reading.

B0VAL03

b7:b1

–

EP03 control register 2 (EP03CON2) [address 001B16]

Bit name

Bit symbol

At reset

Function

H/W

S/W

–: State remaining

Buffer 0 enable bit

Not used

When the selected endpoint is IN, writing “1” to this bit

makes the transmitting data a set state (SIE is possible

to read).

When the selected endpoint is OUT, writing “1” to this

bit makes data reception possible (SIE is possible to

write).

Write “0” when writing.

“0” is read when reading.

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