38K2 datasheet(307/358 Pages) RENESAS

307 / 358 page

3.4 List of registers

Rev.2.00

Oct 15, 2006

page 46 of 99

38K2 Group

REJ09B0338-0200

APPENDIX

Fig. 3.4.19 Structure of EP01 control register 1

Response PID bit

Not used

PID01

[1:0]

b7:b2

–

EP01 control register 1 (EP01CON1) [address 001A16]

Bit name

Bit symbol

At reset

Function

H/W

S/W

b1 b0

0 0 : NAK

0 1 : Automatic response (ACK, NAK, DATA0, DATA1)

1 X : STALL

At occurrence of over-max. packet size :

B1 is set to “1” by the hardware.

Write “0” when writing.

“0” is read when reading.

–: State remaining

Response PID bit

Not used

PID02

[1: 0]

b7:b2

–

EP02 control register 1 (EP02CON1) [address 001A16]

Bit name

Bit symbol

At reset

Function

H/W

S/W

b1 b0

0 0 : NAK

0 1 : Automatic response (ACK, NAK, DATA0, DATA1)

1 X : STALL

At occurrence of over-max. packet size :

B1 is set to “1” by the hardware.

Write “0” when writing.

“0” is read when reading.

–: State remaining

Fig. 3.4.20 Structure of EP02 control register 1

Fig. 3.4.21 Structure of EP03 control register 1

Response PID bit

Not used

PID03

[1:0]

b7:b2

–

EP03 control register 1 (EP03CON1) [address 001A16]

Bit name

Bit symbol

At reset

Function

H/W

S/W

b1 b0

0 0 : NAK

0 1 : Automatic response (ACK, NAK, DATA0, DATA1)

1 X : STALL

At occurrence of over-max. packet size :

B1 is set to “1” by the hardware.

Write “0” when writing.

“0” is read when reading.

–: State remaining

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