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SH7014 Datasheet(PDF) 200 Page - Renesas Technology Corp |
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SH7014 Datasheet(HTML) 200 Page - Renesas Technology Corp |
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200 / 754 page ![]() 9. Direct Memory Access Controller (DMAC) Rev.5.00 Sep. 27, 2007 Page 166 of 716 REJ09B0398-0500 Address Modes Single Address Mode: In the single address mode, both the transfer source and destination are external; one (selectable) is accessed by a DACK signal while the other is accessed by an address. In this mode, the DMAC performs the DMA transfer in 1 bus cycle by simultaneously outputting a transfer request acknowledge DACK signal to one external device to access it while outputting an address to the other end of the transfer. Figure 9.3 shows an example of a transfer between an external memory and an external device with DACK in which the external device outputs data to the data bus while that data is written in external memory in the same bus cycle. DMAC DACK DREQ External memory External device with DACK This LSI External address bus : Data flow External data bus Figure 9.3 Data Flow in Single Address Mode Two types of transfers are possible in the single address mode: (a) transfers between external devices with DACK and memory-mapped external devices, and (b) transfers between external devices with DACK and external memory. The only transfer requests for either of these is the external request ( DREQ). Figure 9.4 shows the DMA transfer timing for the single address mode. |
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