7641 datasheet(160/385 Pages) RENESAS

160 / 385 page

Rev.2.00

Aug 28, 2006

page 29 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.2 Timer

Fig. 2.2.21 Control procedure

SEI

CPMA

CCR

T123M

TYM

TYL

TYH

ICONB

IREQB

P4D

TYM

T123M

CLI

000X1XXX2

0XXX001X2

1010XX002

FF16

10X0XXXX2

000000002

RTI

(address 0016)

(address 1F16),bit7

(address 2916)

(address 2816)

(address 2416)

(address 2516)

(address 2216)

(address 2316)

(address 0616)

(address 0316)

(address 1916),bit4

(address 2816),bit7

(address 2916),bit1

TYL

TYH

FF16

(address 2216)

(address 2316)

RESET

q X: This bit is not used here. Set it to “0” or “1” arbitrary.

•All interrupts disabled

Initialization

Timer 2 interrupt process routine

CLT (Note 1)

CLD (Note 2)

Push registers to stack

Pop registers

•Timer 2 interrupt enabled, Timer Y interrupt disabled

•Set P44/CNTR1 pin to input mode.

•Start of Timer Y count

•Start of Timer 1 count

•Interrupts enabled

Note 1: When using Index X mode flag (T)

Note 2: When using Decimal mode flag (D)

•Pushing registers used in interrupt process routine

•Popping registers pushed to stack

•Set the low-order and then high-order byte.

•

φ = f(XIN)/4

•Event counter mode

•Set division ratio so that Timer 2 interrupt will occur at 1 ms intervals.

T123M (address 2916),bit1

TYM (address 2816),bit7

(“FFFF16”) – (Timer Y count value)

TYM (address 2816),bit7

T123M (address 2916),bit1

•Stop of Timer 1 count

•Stop of Timer Y count

•Input event numbers of P44/CNTR1 pin for 1 ms.

•Start of Timer Y count

•Start of Timer 1 count

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