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7641 Datasheet(PDF) 286 Page - Renesas Technology Corp

Part # 7641
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  385 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7641 Datasheet(HTML) 286 Page - Renesas Technology Corp

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Rev.2.00
Aug 28, 2006
page 7 of 108
7641 Group
REJ09B0336-0200
APPENDIX
3.1 Electrical characteristics
S0, S1 setup time for read
S0, S1 setup time for write
S0, S1 hold time for read
S0, S1 hold time for write
A0 setup time for read
A0 setup time for write
A0 hold time for read
A0 hold time for write
Read pulse width
Write pulse width
Data input setup time before write
Data input hold time after write
Data output enable time after read
Data output disable time after read
OBF output transmission time after read
IBF output transmission time after write
tsu(S-R)
tsu(S-W)
th(R-S)
th(W-S)
tsu(A-R)
tsu(A-W)
th(R-A)
th(W-A)
tw(R)
tw(W)
tsu(D-W)
th(W-D)
ta
(R-D)
tv
(R-D)
tv
(R-OBF)
td
(W-IBF)
Limits
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Min.
0
0
0
0
10
10
0
0
50
50
25
0
10
Typ.
Max.
Symbol
Unit
In Vcc = 5 V
Table 3.1.6 Master CPU bus interface (MBI; RD, WR separate type) (Vcc = 4.15 to 5.25 V, Vss = 0
V, Ta = –20 to 70°C, unless otherwise noted)
40
40
40
S0, S1 setup time
S0, S1 hold time
A0 setup time
A0 hold time
R/W setup time
R/W hold time
Enable pulse width
Enable pulse interval
Data input setup time before write
Data input hold time after write
Data output enable time after read
Data output disable time after read
OBF output transmission time after E inactive
IBF output transmission time after E inactive
tsu(S-E)
th(E-S)
tsu(A-E)
th(E-A)
tsu(RW-E)
th(E-RW)
tw(E)
tw(E-E)
tsu(D-E)
th(E-D)
ta(E-D)
tv(E-D)
tv(E-OBF)
td(E-IBF)
Limits
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Min.
0
0
10
0
10
10
50
50
25
0
10
Typ.
Max.
Symbol
Unit
40
40
40
In Vcc = 5 V
Table 3.1.7 Master CPU bus interface (MBI; R/W type) (Vcc = 4.15 to 5.25 V, Vss = 0 V, Ta = –20
to 70°C, unless otherwise noted)



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