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SH7713 Datasheet(PDF) 338 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 338 Page - Renesas Technology Corp |
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338 / 904 page ![]() Section 10 Power-Down Modes Rev.1.50 Aug. 30, 2006 Page 298 of 860 REJ09B0288-0150 10.1.3 Input/Output Pins Table 10.2 lists the pins used for the power-down modes. Table 10.2 Pin Configuration Pin Name Symbol I/O Description Processing state 1 STATUS1 Processing state 0 STATUS0 O Indicates the operating state of the processor. HH: Reset HL: Sleep mode LH: Standby mode LL: Normal operation Power-on reset RESETP I Inputting low level signal to this pin cause a transition to power-on reset processing. Manual reset RESETM I Inputting low level signal to this pin cause a transition to manual reset processing. Note: H and L indicate high and low levels, respectively. The STATUS1 and STATUS0 pins indicate the pin status in this order. 10.2 Register Descriptions The following registers are used for the power-down modes. Refer to section 23, List of Registers, for the addresses and access size for these registers. • Standby control register (STBCR) • Standby control register 2 (STBCR2) • Standby control register 3 (STBCR3) 10.2.1 Standby Control Register (STBCR) STBCR is an 8-bit readable/writable register that specifies the state of the power-down mode. This register is initialized to H ′00 at power-on reset but retains the previous value after manual reset. |
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