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SH7713 Datasheet(PDF) 353 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 353 Page - Renesas Technology Corp |
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353 / 904 page ![]() Section 11 On-Chip Oscillation Circuits Rev.1.50 Aug. 30, 2006 Page 313 of 860 REJ09B0288-0150 11.2 Overview of CPG 11.2.1 CPG Block Diagram A block diagram of the on-chip clock pulse generator is shown in figure 11.1. CKIO CKIO2 XTAL Crystal oscillator PLL circuit 1 ( 1, 2, 3) PLL circuit 2 ( 1, 2, 4) Clock pulse generator Clock frequency control circuit Standby control circuit STBCR Bus interface Internal bus FRQCR: Frequency control register STBCR: Standby control register STBCR2: Standby control register 2 STBCR3: Standby control register 3 [Legend] Peripheral clock (P ) EXTAL CPG control unit 1 1/2 1/3 1/4 1/6 Internal clock (I ) Divider 1 Bus clock (B =CKIO) STBCR3 STBCR2 FRQCR Figure 11.1 Block Diagram of CPG |
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